PIC16LF871T-I/PT Microchip Technology, PIC16LF871T-I/PT Datasheet - Page 101
![IC MCU FLASH 2KX14 EE A/D 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC16LF871T-I/PT
Manufacturer Part Number
PIC16LF871T-I/PT
Description
IC MCU FLASH 2KX14 EE A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF871T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
PSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
28 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF871T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
11.12 Watchdog Timer (WDT)
The Watchdog Timer is a free running on-chip RC oscil-
lator which does not require any external components.
This RC oscillator is separate from the RC oscillator of
the OSC1/CLKI pin. That means that the WDT will run,
even if the clock on the OSC1/CLKI and OSC2/CLKO
pins of the device has been stopped, for example, by
execution of a SLEEP instruction.
During normal operation, a WDT time-out generates a
device RESET (Watchdog Timer Reset). If the device is
in SLEEP mode, a WDT time-out causes the device to
wake-up
(Watchdog Timer Wake-up). The TO bit in the STATUS
register will be cleared upon a Watchdog Timer
time-out.
The WDT can be permanently disabled by clearing
configuration bit WDTEN (Section 11.1).
FIGURE 11-10:
TABLE 11-7:
2003 Microchip Technology Inc.
2007h
81h,181h
Legend:
Note 1:
Address
Note:
and
Shaded cells are not used by the Watchdog Timer.
See Register 11-1 for operation of these bits.
PSA and PS2:PS0 are bits in the OPTION_REG register.
Config. bits
OPTION_REG
continue
Name
SUMMARY OF WATCHDOG TIMER REGISTERS
WATCHDOG TIMER BLOCK DIAGRAM
WDT Timer
Enable Bit
WDT
with
RBPU
From TMR0 Clock Source
(Figure 5-1)
Bit 7
(1)
normal
BOREN
INTEDG
Bit 6
operation
0
1
(1)
PSA
M
U
X
T0CS
Bit 5
CP1
WDT time-out period values may be found in the Elec-
trical Specifications section under parameter #31. Val-
ues for the WDT prescaler (actually a postscaler, but
shared with the Timer0 prescaler) may be assigned
using the OPTION_REG register.
T0SE
Bit 4
CP0
0
Note 1: The CLRWDT and SLEEP instructions
Time-out
8 - to - 1 MUX
MUX
WDT
Postscaler
2: When a CLRWDT instruction is executed
PWRTEN
1
Bit 3
clear the WDT and the postscaler, if
assigned to the WDT, and prevent it from
timing out and generating a device
RESET condition.
and the prescaler is assigned to the WDT,
the prescaler count will be cleared, but
the prescaler assignment is not changed.
PSA
8
PIC16F870/871
(1)
PSA
To TMR0 (Figure 5-1)
WDTEN
Bit 2
PS2
PS2:PS0
FOSC1
Bit 1
PS1
DS30569B-page 99
FOSC0
Bit 0
PS0