PIC16LC621-04E/P Microchip Technology, PIC16LC621-04E/P Datasheet - Page 121
![IC MCU OTP 1KX14 COMP 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16LC621-04E/P
Manufacturer Part Number
PIC16LC621-04E/P
Description
IC MCU OTP 1KX14 COMP 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16C620A-04SO.pdf
(128 pages)
Specifications of PIC16LC621-04E/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
OTP
Ram Size
80 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
18-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
APPENDIX A: ENHANCEMENTS
The following are the list of enhancements over the
PIC16C5X microcontroller family:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Wake-up from SLEEP through interrupt is
11. Two separate timers, Oscillator Start-up Timer
12. PORTB has weak pull-ups and interrupt-on-
13. Timer0 clock input, T0CKI pin is also a port pin
14. FSR is made a full 8-bit register.
15. “In-circuit programming” is made possible. The
16. PCON STATUS register is added with a Power-
17. Code protection scheme is enhanced such that
18. PORTA inputs are now Schmitt Trigger inputs.
19. Brown-out Reset reset has been added.
20. Common RAM registers F0h-FFh implemented
2003 Microchip Technology Inc.
Instruction word length is increased to 14 bits.
This allows larger page sizes both in program
memory (4K now as opposed to 512 before) and
register file (up to 128 bytes now versus 32
bytes before).
A PC high latch register (PCLATH) is added to
handle program memory paging. PA2, PA1, PA0
bits are removed from STATUS register.
Data memory paging is slightly redefined.
STATUS register is modified.
Four new instructions have been added:
RETURN
Two instructions
phased out, although they are kept for
compatibility with PIC16C5X.
OPTION
addressable.
Interrupt capability is added. Interrupt vector is
at 0004h.
Stack size is increased to 8 deep.
RESET vector is changed to 0000h.
RESET of all registers is revisited. Five different
RESET (and wake-up) types are recognized.
Registers are reset differently.
added.
(OST) and Power-up Timer (PWRT) are
included for more reliable power-up. These
timers
unnecessary delays on power-up and wake-up.
change feature.
(RA4/T0CKI) and has a TRIS bit.
user can program PIC16CXX devices using only
five pins: V
(data in/out).
on-Reset (POR) STATUS bit and a Brown-out
Reset STATUS bit (BOD).
portions of the program memory can be
protected, while the remainder is unprotected.
in bank1.
,
RETFIE
are
and
DD
, V
invoked
,
ADDLW
TRIS
SS
TRIS
, V
PP
, and
and
, RB6 (clock) and RB7
registers
selectively
SUBLW
OPTION
.
are
are being
to
made
avoid
APPENDIX B: COMPATIBILITY
To convert code written for PIC16C5X to PIC16CXX,
the user should take the following steps:
1.
2.
3.
4.
5.
Remove any program memory page select
operations (PA2, PA1, PA0 bits) for
Revisit any computed jump operations (write to
PC or add to PC, etc.) to make sure page bits
are set properly under the new scheme.
Eliminate any data memory page switching.
Redefine data variables to reallocate them.
Verify all writes to STATUS, OPTION, and FSR
registers since these have changed.
Change RESET vector to 0000h.
PIC16C62X
DS30235J-page 119
CALL
,
GOTO
.