PIC16C642-20/SO Microchip Technology, PIC16C642-20/SO Datasheet - Page 28

• Manufacturer Part Number: PIC16C642-20/SO
• Description: IC MCU OTP 4KX14 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C642-20/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, WDT
• Number Of I /o: 22
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Interface Type: RS- 232
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16C64X & PIC16C66X
4.5
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses data pointed to by the file select register
(FSR). Reading INDF itself indirectly will produce 00h.
Writing to the INDF register indirectly results in a no-
operation (although status bits may be affected). An
effective 9-bit address is obtained by concatenating the
8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 4-12. However, bit IRP is not used in
the PIC16C64X & PIC16C66X.
FIGURE 4-12: DIRECT/INDIRECT ADDRESSING
DS30559A-page 28
(1)
bank select
RP1 RP0
For memory map detail see Figure 4-3 and Figure 4-4.
Note 1: Bits RP1 and IRP are reserved, always maintain these bits clear.
Indirect Addressing, INDF, and FSR
Registers
location select
6
Direct Addressing
Data
Memory
from opcode
7Fh
00h
Bank 0
00
0
Bank 1
01
Preliminary
Bank 2
10
not used
A simple program to clear RAM location 20h-2Fh using
indirect addressing is shown in Example 4-1.
EXAMPLE 4-1:
NEXT
CONTINUE:
Bank 3
11
IRP
movlw 0x20
movwf FSR
clrf
incf
btfss FSR,4 ;all done?
goto
bank select
00h
7Fh
(1)
INDF
FSR
NEXT
INDIRECT ADDRESSING
7
Indirect Addressing
1996 Microchip Technology Inc.
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;no goto next
;yes continue
FSR register
location select
0