PIC16C620-04E/SO Microchip Technology, PIC16C620-04E/SO Datasheet - Page 46
![IC MCU OTP 512X14 COMP 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16C620-04E/SO
Manufacturer Part Number
PIC16C620-04E/SO
Description
IC MCU OTP 512X14 COMP 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C620-04E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
896B (512 x 14)
Program Memory Type
OTP
Ram Size
80 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
PIC16C62X
EXAMPLE 8-1:
8.2
The full range of V
construction of the module. The transistors on the top
and bottom of the resistor ladder network (Figure 8-1)
keep V
reference is V
changes with fluctuations in V
accuracy of the voltage reference can be found in
Table 12-2.
8.3
When the device wakes up from SLEEP through an
interrupt or a Watchdog Timer time-out, the contents of
the VRCON register are not affected. To minimize
current consumption in SLEEP mode, the voltage
reference should be disabled.
FIGURE 8-2:
TABLE 8-1:
DS30235J-page 44
MOVLW
MOVWF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BCF
CALL
Address
9Fh
1Fh
85h
Note:
Note 1: R is dependent upon the Voltage Reference Configuration VRCON<3:0> and VRCON<5>.
REF
Voltage Reference Accuracy/Error
Operation During SLEEP
Name
VRCON
CMCON
TRISA
from approaching V
- = Unimplemented, read as "0"
0x02
CMCON
STATUS,RP0
0x0F
TRISA
0xA6
VRCON
STATUS,RP0
DELAY10
DD
derived and therefore, the V
SS
REGISTERS ASSOCIATED WITH VOLTAGE REFERENCE
Module
to V
V
REF
C2OUT
VREN
VOLTAGE REFERENCE
CONFIGURATION
VOLTAGE REFERENCE OUTPUT BUFFER EXAMPLE
Bit 7
DD
—
cannot be realized due to the
Impedance
Reference
Voltage
Output
; 4 Inputs Muxed
; to 2 comps.
; go to Bank 1
; RA3-RA0 are
; inputs
; enable V
; low range
; set V
; go to Bank 0
; 10µs delay
DD
SS
C1OUT
VROE
Bit 6
R
. The tested absolute
—
(1)
or V
R
<3:0>=6
DD
Bit 5
VRR
REF
. The voltage
—
—
RA
REF
TRISA4
Bit 4
output
•
—
—
TRISA3
Bit 3
VR3
CIS
8.4
A device RESET disables the voltage reference by
clearing bit V
disconnects the reference from the RA2 pin by clearing
bit V
range by clearing bit V
value select bits, VRCON<3:0>, are also cleared.
8.5
The voltage reference module operates independently
of the comparator module. The output of the reference
generator may be connected to the RA2 pin if the
TRISA<2> bit is set and the V
set. Enabling the voltage reference output onto the
RA2 pin with an input signal present will increase
current consumption. Connecting RA2 as a digital
output with V
consumption.
The RA2 pin can be used as a simple D/A output with
limited drive capability. Due to the limited drive
capability, a buffer must be used in conjunction with the
voltage reference output for external connections to
V
technique.
REF
TRISA2
Bit 2
CM2
VR2
ROE
.
+
–
Figure 8-2
Effects of a RESET
Connection Considerations
(VRCON<6>) and selects the high voltage
TRISA1
Bit 1
CM1
VR1
REF
•
REN
enabled will also increase current
TRISA0
shows
V
(VRCON<7>). This reset also
Bit 0
CM0
REF
VR0
2003 Microchip Technology Inc.
RR
Output
(VRCON<5>). The V
an
000- 0000
00-- 0000
---1 1111
ROE
Value On
POR
example
bit, VRCON<6>, is
000- 0000
00-- 0000
---1 1111
Value On
All Other
RESETS
buffering
REF