AT90S8515-8JC Atmel, AT90S8515-8JC Datasheet - Page 18
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AT90S8515-8JC
Manufacturer Part Number
AT90S8515-8JC
Description
IC MCU 8K FLSH 8MHZ 44PLCC
Manufacturer
Atmel
Series
AVR® 90Sr
Datasheets
1.AT90S8515-4AC.pdf
(112 pages)
2.AT90S8515-4AC.pdf
(4 pages)
3.AT90S8515-4AC.pdf
(4 pages)
Specifications of AT90S8515-8JC
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT90S8515-8JC
Manufacturer:
ATM
Quantity:
3 670
Company:
Part Number:
AT90S8515-8JC
Manufacturer:
ATM
Quantity:
3 670
Company:
Part Number:
AT90S8515-8JC
Manufacturer:
ATMEL
Quantity:
5 510
18
AT90S8515
Figure 20. The Parallel Instruction Fetches and Instruction Executions
Figure 21 shows the internal timing concept for the register file. In a single clock cycle
an ALU operation using two register operands is executed and the result is stored back
to the destination register.
Figure 21. Single Cycle ALU Operation
The internal data SRAM access is performed in two System Clock cycles as described
in Figure 22.
Figure 22. On-chip Data SRAM Access Cycles
See “Interface to External SRAM” on page 60 for a description of the access to the
external SRAM.
System Clock Ø
Register Operands Fetch
2nd Instruction Execute
3rd Instruction Execute
1st Instruction Execute
ALU Operation Execute
2nd Instruction Fetch
3rd Instruction Fetch
4th Instruction Fetch
1st Instruction Fetch
Total Execution Time
Result Write Back
System Clock Ø
Address
System Clock Ø
Data
Data
WR
RD
Prev. Address
T1
T1
T1
Address
T2
T2
T2
T3
T3
T3
T4
0841G–09/01
T4
T4