AT90S1200-12YI Atmel, AT90S1200-12YI Datasheet - Page 43
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AT90S1200-12YI
Manufacturer Part Number
AT90S1200-12YI
Description
IC MCU 1K FLSH 12MHZ IT 20SSOP
Manufacturer
Atmel
Series
AVR® 90Sr
Datasheet
1.AT90S1200-12PC.pdf
(71 pages)
Specifications of AT90S1200-12YI
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
SPI
Peripherals
POR, WDT
Number Of I /o
15
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Ram Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT90S1200-12YI
Manufacturer:
ATMEL
Quantity:
5 510
Part Number:
AT90S1200-12YI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Reading the Signature Bytes
Parallel Programming
Characteristics
0838H–AVR–03/02
The algorithm for reading the signature bytes is as follows (refer to “Programming the
Flash” on page 39 for details on command and address loading):
1. A: Load Command “0000 1000”.
2. C: Load Address Low Byte ($00 - $02).
Figure 33. Parallel Programming Timing
Table 17. Parallel Programming Characteristics, T
Notes:
Symbol
V
I
t
t
t
t
t
t
t
t
t
t
t
t
t
t
(DATA, XA0/1, BS)
PP
DVXH
XHXL
XLDX
XLWL
BVWL
RHBX
WLWH
WHRL
WLRH
XLOL
OLDV
OHDZ
WLWH_CE
WLWH_PFB
PP
Set OE to “0”, and BS to “0”. The selected signature byte can now be read at DATA.
Set OE to “1”.
Data & Contol
1. Use t
2. If t
RDY/BSY
XTAL1
DATA
Parameter
Programming Enable Voltage
Programming Enable Current
Data and Control Setup before XTAL1 High
XTAL1 Pulse Width High
Data and Control Hold after XTAL1 Low
XTAL1 Low to WR Low
BS Valid to WR Low
BS Hold after RDY/BSY High
WR Pulse Width Low
WR High to RDY/BSY Low
WR Low to RDY/BSY High
XTAL1 Low to OE Low
OE Low to DATA Valid
OE High to DATA Tri-stated
WR Pulse Width Low for Chip Erase
WR Pulse Width Low for Programming the Fuse
Bits
WLWH
WR
OE
WLWH_CE
is held longer than t
t
DVXH
for chip erase and t
t
XHXL
(1)
t
t
t
XLOL
XLDX
XLWL
WLRH
(2)
(2)
, no RDY/BSY pulse will be seen.
WLWH_PFB
t
BVWL
t
WLWH
for programming the Fuse bits.
t
A
OLDV
= 25 ° C ± 10%, V
t
WHRL
11.5
67.0
67.0
67.0
67.0
67.0
67.0
67.0
67.0
Min
0.5
5.0
1.0
AT90S1200
20.0
20.0
10.0
Typ
0.7
1.5
CC
t
t
WLRH
OHDZ
t
= 5V ± 10%
RHBX
250.0
Max
12.5
20.0
15.0
0.9
1.8
Units
ms
ms
ms
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
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