AT91M43300-25CC Atmel, AT91M43300-25CC Datasheet - Page 10

• Manufacturer Part Number: AT91M43300-25CC
• Description: IC ARM7 MCU 144 BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91M43300-25CC

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: WDT
• Number Of I /o: 58
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-LFBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

12. WD: Watchdog Timer
13. PMC: Power Management Controller
14. SF: Special Function
10
AT91M43300
Each Timer Counter block features two global registers which act upon all three TC channels.
The Block Control Register allows the three channels to be started simultaneously with the same
instruction. The Block Mode Register defines the external clock inputs for each Timer Counter
channel, allowing them to be chained.
The AT91M43300 features an internal Watchdog Timer which can be used to guard against sys-
tem lock-up if the software becomes trapped in a deadlock.
The Power Management Controller allows optimization of power consumption. The PMC
enables/disables the clock inputs to most of the peripherals as well as to the ARM processor
core.
When the ARM core clock is disabled, the current instruction is processed before the clock is
stopped. The clock can be re-enabled by any enabled interrupt or by a hardware reset.
When a peripheral clock is disabled, the clock is immediately stopped. When the clock is re-
enabled, the peripheral resumes action where it left off.
Due to the static nature of the design, the contents of the on-chip RAM and registers for which
the clocks are disabled remain unchanged
The AT91M43300 provides registers which implement the following special functions.
•
•
Chip identification
RESET status
1322B–ATARM–12-Dec-05