PIC17C756-33I/SP Microchip Technology, PIC17C756-33I/SP Datasheet - Page 215
PIC17C756-33I/SP
Manufacturer Part Number
PIC17C756-33I/SP
Description
MICRO CTRL 16K MEMORY OTP 64SDIP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756-33I/SP
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
PIC17C756-33I/P
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C756-33I/SP
Manufacturer:
OKI
Quantity:
6 270
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 215 of 321
- Download datasheet (3Mb)
TABLWT
Example1:
Example 2:
1997 Microchip Technology Inc.
Before Instruction
After Instruction (table write completion)
Before Instruction
After Instruction (table write completion)
Program
Memory
16 bits
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR - 1) =
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
Table Write
TABLWT
TABLWT
15
15
TBLPTR
TBLAT
8
1, 1, REG
0, 0, REG
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
7
0x53
0xAA
0x55
0xA356
0xFFFF
0x53
0x53
0x55
0xA357
0x5355
0x53
0xAA
0x55
0xA356
0xFFFF
0x53
0xAA
0x53
0xA356
0xAA53
0
0
Memory
8 bits
Data
TLRD
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Before Instruction
After Instruction
Program
Memory
16 bits
Decode
t
RAM
TBLAT
RAM
TBLAT
t
RAM
TBLAT
RAM
TBLAT
Q1
=
=
=
=
=
=
=
=
=
=
TBLATH or
Table Latch Read
[ label ] TLRD t,f
0
t
If t = 0,
If t = 1,
None
Read data from 16-bit table latch
(TBLAT) into file register 'f'. Table Latch
is unaffected.
If t = 1; high byte is read
If t = 0; low byte is read
This instruction is used in conjunction
with TABLRD to transfer data from pro-
gram memory to data memory.
1
1
TLRD
TBLATL
register
Read
1010
Q2
TBLATL
TBLATH
0
?
0x00AF
0xAF
0x00AF
1
?
0x00AF
0x00
0x00AF
[0,1]
f
15
15
255
TBLPTR
TBLAT
8
t, RAM
00tx
(TBLATH = 0x00)
(TBLATL = 0xAF)
(TBLATH = 0x00)
(TBLATL = 0xAF)
(TBLATH = 0x00)
(TBLATL = 0xAF)
(TBLATH = 0x00)
(TBLATL = 0xAF)
7
Process
Data
f;
Q3
f
DS30264A-page 215
0
0
ffff
register 'f'
Memory
8 bits
Data
Write
Q4
ffff
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