PIC16C64-10/L Microchip Technology, PIC16C64-10/L Datasheet - Page 128
![MICRO CTRL 2K X 14 OTP 44 PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC16C64-10/L
Manufacturer Part Number
PIC16C64-10/L
Description
MICRO CTRL 2K X 14 OTP 44 PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C64-10/L
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Data Converters
-
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PIC16C6X
13.3
The PIC16CXX differentiates between various kinds of
reset:
• Power-on Reset (POR)
• MCLR reset during normal operation
• MCLR reset during SLEEP
• WDT Reset (normal operation)
• Brown-out Reset (BOR) - Not on PIC16C61/62/
Some registers are not affected in any reset condition,
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
state” on Power-on Reset (POR), on MCLR or WDT
Reset, on MCLR reset during SLEEP, and on Brown-
out Reset (BOR). They are not affected by a WDT
Wake-up, which is viewed as the resumption of normal
operation.
FIGURE 13-9: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
DS30234D-page 128
Applicable Devices
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
MCLR/V
64/65
V
OSC1/
CLKIN
DD
pin
pin
2: Brown-out Reset is NOT implemented on the PIC16C61/62/64/65.
3: See Table 13-5 and Table 13-6 for time-out situations.
Reset
PP
pin
RC OSC
On-chip
OST/PWRT
Brown-out
V
Module
detect
WDT
DD
Reset
(1)
rise
OST
PWRT
10-bit Ripple counter
10-bit Ripple counter
External Reset
(2)
Time-out
Power-on Reset
BODEN
WDT
SLEEP
Enable PWRT
Enable OST
The TO and PD bits are set or cleared differently in dif-
ferent reset situations as indicated in Table 13-7,
Table 13-8, and Table 13-9. These bits are used in soft-
ware to determine the nature of the reset. See
Table 13-12 for a full description of reset states of all
registers.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 13-9.
On the PIC16C62A/R62/63/R63/64A/R64/65A/R65/
66/67, the MCLR reset path has a noise filter to detect
and ignore small pulses. See parameter #34 for pulse
width specifications.
It should be noted that a WDT Reset does not drive the
MCLR pin low.
(3)
1997 Microchip Technology Inc.
S
R
Q
Chip Reset
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