SAK-C167CR-L33M HA+ Infineon Technologies, SAK-C167CR-L33M HA+ Datasheet - Page 42

• Manufacturer Part Number: SAK-C167CR-L33M HA+
• Description: IC MCU 16BIT 2KB XRAM MQFP-144
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAK-C167CR-L33M HA+

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144- BSQFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: CAN, SSC, USART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 9
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Packages: PG-MQFP-144
• Max Clock Frequency: 33.0 MHz
• Sram (incl. Cache): 4.0 KByte
• Can Nodes: 1
• A / D Input Lines (incl. Fadc): 16
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: K167CRL33MHAZNP; K167CRL33MHAZXP; SAKC167CRL33MHA; SP000017997; SP000103460; SP000103461

Figure 7
With its maximum resolution of 8 TCL, the GPT2 module provides precise event control
and time measurement. It includes two timers (T5, T6) and a capture/reload register
(CAPREL). Both timers can be clocked with an input clock which is derived from the CPU
clock via a programmable prescaler or with external signals. The count direction
(up/down) for each timer is programmable by software or may additionally be altered
dynamically by an external signal on a port pin (TxEUD). Concatenation of the timers is
supported via the output toggle latch (T6OTL) of timer T6, which changes its state on
each timer overflow/underflow.
The state of this latch may be used to clock timer T5, and/or it may be output on pin
T6OUT. The overflows/underflows of timer T6 can additionally be used to clock the
CAPCOM timers T0 or T1, and to cause a reload from the CAPREL register. The
CAPREL register may capture the contents of timer T5 based on an external signal
transition on the corresponding port pin (CAPIN), and timer T5 may optionally be cleared
after the capture procedure. This allows the C167CR to measure absolute time
differences or to perform pulse multiplication without software overhead.
Data Sheet
n = 3 … 10
T2EUD
T3EUD
T4EUD
T2IN
T3IN
T4IN
f
f
f
CPU
CPU
CPU
Block Diagram of GPT1
2
2
2
n
n
n
: 1
: 1
: 1
Control
Control
Control
Mode
Mode
Mode
T2
T3
T4
Capture
Capture
Reload
Reload
U/D
GPT1 Timer T2
GPT1 Timer T3
GPT1 Timer T4
40
U/D
U/D
Toggle FF
T3OTL
Functional Description
Interrupt
Request
Interrupt
Request
Other
Timers
Interrupt
Request
V3.3, 2005-02
T3OUT
MCT02141
C167CR
C167SR