SAK-C164CI-LM CA+ Infineon Technologies, SAK-C164CI-LM CA+ Datasheet - Page 11
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SAK-C164CI-LM CA+
Manufacturer Part Number
SAK-C164CI-LM CA+
Description
IC MCU 16BIT FLASH 80-MQFP
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAF-C164CI-8EM_CB.pdf
(79 pages)
Specifications of SAK-C164CI-LM CA+
Core Processor
C166
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
59
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-SQFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
1xASC, 1xSSC
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
59
Number Of Timers
5
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
SP000017581
Table 2
Symbol Pin
EA/
PORT0
P0L.0-7
P0H.0-7
Data Sheet
V
PP
No.
28
29-
36
37-39,
42-46
Pin Definitions and Functions (cont’d)
Input
Outp.
I
IO
Function
External Access Enable pin.
A low level at this pin during and after Reset forces the
C164CI to latch the configuration from PORT0 and pin RD,
and to begin instruction execution out of external memory.
A high level forces the C164CI to latch the configuration
from pins RD and ALE, and to begin instruction execution out
of the internal program memory.
“ROMless” versions must have this pin tied to ‘0’.
Note: This pin also accepts the programming voltage for the
PORT0 consists of the two 8-bit bidirectional I/O ports P0L
and P0H. It is bit-wise programmable for input or output via
direction bits. For a pin configured as input, the output driver
is put into high-impedance state.
In case of an external bus configuration, PORT0 serves as
the address (A) and address/data (AD) bus in multiplexed
bus modes and as the data (D) bus in demultiplexed bus
modes.
Demultiplexed bus modes:
Data Path Width:
P0L.0 – P0L.7:
P0H.0 – P0H.7:
Multiplexed bus modes:
Data Path Width:
P0L.0 – P0L.7:
P0H.0 – P0H.7:
OTP derivatives.
7
8-bit
D0 – D7
I/O
8-bit
AD0 – AD7
A8 – A15
16-bit
D0 – D7
D8 – D15
16-bit
AD0 – AD7
AD8 – AD15
C164CL/SL
V2.0, 2001-05
C164CI/SI