UPD78F1146AGA-HAB-AX Renesas Electronics America, UPD78F1146AGA-HAB-AX Datasheet - Page 639
UPD78F1146AGA-HAB-AX
Manufacturer Part Number
UPD78F1146AGA-HAB-AX
Description
MCU 16BIT 78K0R/KX3 64-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1146AGA-HAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1146AGA-HAB-AX
Manufacturer:
UBIQ
Quantity:
12 000
Company:
Part Number:
UPD78F1146AGA-HAB-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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20.4.1 When used as reset
(1) When detecting level of supply voltage (V
(a) When LVI Default Start Function Stopped Is Set (Option Byte: LVIOFF = 1)
• When starting operation
• When stopping operation
•
•
Either of the following procedures must be executed.
<1>
<2>
<3>
<4>
<5>
<6>
<7>
Figure 20-5 shows the timing of the internal reset signal generated by the low-voltage detector. The
numbers in this timing chart correspond to <1> to <7> above.
Cautions 1. <1> must always be executed. When LVIMK = 0, an interrupt may occur immediately
When using 8-bit memory manipulation instruction:
Write 00H to LVIM.
When using 1-bit memory manipulation instruction:
Clear LVIMD to 0 and then LVION to 0.
Mask the LVI interrupt (LVIMK = 1).
Clear bit 2 (LVISEL) of the low-voltage detection register (LVIM) to 0 (detects level of supply voltage
Set the detection voltage using bits 3 to 0 (LVIS3 to LVIS0) of the low-voltage detection level
Set bit 7 (LVION) of LVIM to 1 (enables LVI operation).
Use software to wait for the following periods of time (Total 410
Wait until it is checked that (supply voltage (V
Set bit 1 (LVIMD) of LVIM to 1 (generates reset when the level is detected).
(V
selection register (LVIS).
•
•
•
DD
Operation stabilization time (10
Minimum pulse width (200
Detection delay time (200
)) (default value).
2. If supply voltage (V
after the processing in <4>.
reset signal is not generated.
CHAPTER 20 LOW-VOLTAGE DETECTOR
User’s Manual U17854EJ9V0UD
μ
DD
μ
s (MAX.))
s (MIN.))
) ≥ detection voltage (V
DD
)
μ
s (MAX.))
DD
) ≥ detection voltage (V
LVI
) when LVIMD is set to 1, an internal
μ
s).
LVI
)) by bit 0 (LVIF) of LVIM.
637
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