UPD78F1152AGK-GAK-AX Renesas Electronics America, UPD78F1152AGK-GAK-AX Datasheet - Page 852

• Manufacturer Part Number: UPD78F1152AGK-GAK-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGK-GAK-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

850
Clock
generator
Function
CSC: Clock
operation status
control register
OSTC:
Oscillation
stabilization time
counter status
register
OSTS:
Oscillation
stabilization time
select register
CKC: System
clock control
register
Details of
Function
The setting of the flags of the register to stop clock oscillation (invalidate the external
clock input) and the condition before clock oscillation is to be stopped are as follows.
(See Table 5-2.)
After the above time has elapsed, the bits are set to 1 in order from MOST8 and
remain 1.
The oscillation stabilization time counter counts up to the oscillation stabilization time
• If the X1 clock starts oscillation while the internal high-speed oscillation clock or
• If the STOP mode is entered and then released while the internal high-speed
The X1 clock oscillation stabilization wait time does not include the time until clock
oscillation starts (“a” below).
To set the STOP mode when the X1 clock is used as the CPU clock, set the OSTS
register before executing the STOP instruction.
Setting the oscillation stabilization time to 20
To change the setting of the OSTS register, be sure to confirm that the counting
operation of the OSTC register has been completed.
Do not change the value of the OSTS register during the X1 clock oscillation
stabilization time.
The oscillation stabilization time counter counts up to the oscillation stabilization time
set by OSTS. In the following cases, set the oscillation stabilization time of OSTS to
the value greater than or equal to the count value which is to be checked by the
OSTC register.
• If the X1 clock starts oscillation while the internal high-speed oscillation clock or
• If the STOP mode is entered and then released while the internal high-speed
The X1 clock oscillation stabilization wait time does not include the time until clock
oscillation starts (“a” below).
Be sure to set bit 3 to 1.
The clock set by CSS, MCM0, and MDIV2 to MDIV0 is supplied to the CPU and
peripheral hardware. If the CPU clock is changed, therefore, the clock supplied to
peripheral hardware (except the real-time counter, clock output/buzzer output, and
watchdog timer) is also changed at the same time.
peripheral function when changing the CPU/peripheral operating hardware clock.
If the peripheral hardware clock is used as the subsystem clock, the operations of the
A/D converter and IIC0 are not guaranteed. For the operating characteristics of the
peripheral hardware, refer to the chapters describing the various peripheral hardware
as
PRODUCTS) and CHAPTER 29 ELECTRICAL SPECIFICATIONS ((A) GRADE
PRODUCTS).
set by OSTS. In the following cases, set the oscillation stabilization time of OSTS to
the value greater than or equal to the count value which is to be checked by the
OSTC register after the oscillation starts.
subsystem clock is being used as the CPU clock. If the STOP mode is entered and
then released while the internal
oscillation clock is being used as the CPU clock with the X1 clock oscillating.
(Note, therefore, that only the status up to the oscillation stabilization time set by
OSTS is set to OSTC after the STOP mode is released.)
subsystem clock is being used as the CPU clock.
oscillation clock is being used as the CPU clock with the X1 clock oscillating.
(Note, therefore, that only the status up to the oscillation stabilization time set by
OSTS is set to OSTC after the STOP mode is released.)
well
APPENDIX B LIST OF CAUTIONS
as
User’s Manual U17893EJ8V0UD
CHAPTER
28
ELECTRICAL
Cautions
μ
s or less is prohibited.
SPECIFICATIONS
Consequently, stop each
(STANDARD
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