SAF-XC878-13FFI 5V AA Infineon Technologies, SAF-XC878-13FFI 5V AA Datasheet - Page 50
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SAF-XC878-13FFI 5V AA
Manufacturer Part Number
SAF-XC878-13FFI 5V AA
Description
IC MCU 8BIT FLASH 64-LQFP
Manufacturer
Infineon Technologies
Series
XC8xxr
Specifications of SAF-XC878-13FFI 5V AA
Core Processor
XC800
Core Size
8-Bit
Speed
27MHz
Connectivity
SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
40
Program Memory Size
52KB (52K x 8)
Program Memory Type
FLASH
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SP000447274
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3.2.4.7
The ADC SFRs can be accessed in the standard memory area (RMAP = 0).
Table 11
Addr Register Name
RMAP = 0
D1 H
RMAP = 0, PAGE 0
CA H
CB H
CC H
CD H
CE H
CF H
RMAP = 0, PAGE 1
CA H
CB H
CC H
CD H
CE H
CF H
D2 H
D3 H
Data Sheet
ADC_PAGE
Page Register
ADC_GLOBCTR Reset: 30 H
Global Control Register
ADC_GLOBSTR Reset: 00 H
Global Status Register
ADC_PRAR
Priority and Arbitration Register
ADC_LCBR
Limit Check Boundary Register
ADC_INPCR0
Input Class 0 Register
ADC_ETRCR
External Trigger Control
Register
ADC_CHCTR0
Channel Control Register 0
ADC_CHCTR1
Channel Control Register 1
ADC_CHCTR2
Channel Control Register 2
ADC_CHCTR3
Channel Control Register 3
ADC_CHCTR4
Channel Control Register 4
ADC_CHCTR5
Channel Control Register 5
ADC_CHCTR6
Channel Control Register 6
ADC_CHCTR7
Channel Control Register 7
ADC Registers
ADC Register Overview
Reset: 00 H
Reset: 00 H
Reset: B7 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Reset: 00 H
Bit
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
Bit Field
Type
ANON
ASEN
SYNE
N1
rw
rw
rw
7
1
0
0
0
0
0
0
0
0
r
r
r
r
r
r
r
r
OP
w
0
r
43
ASEN
SYNE
DW
N0
rw
rw
rw
6
0
BOUND1
rw
LCC
LCC
LCC
LCC
LCC
LCC
LCC
LCC
rw
rw
rw
rw
rw
rw
rw
rw
5
0
r
STNR
CTC
rw
w
ETRSEL1
CHNR
ARBM
rw
rw
rh
4
STC
rw
Functional Description
CSM1
rw
3
0
r
0
0
0
0
0
0
0
0
r
r
r
r
r
r
r
r
PRIO1
rw
2
0
r
BOUND0
rw
XC87xCLM
0
r
ETRSEL0
V1.5, 2011-03
PAGE
SAMP
CSM0
LE
rw
rw
rw
rh
1
RESRSEL
RESRSEL
RESRSEL
RESRSEL
RESRSEL
RESRSEL
RESRSEL
RESRSEL
rw
rw
rw
rw
rw
rw
rw
rw
PRIO0
BUSY
rw
rh
0
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