M30873FHGP#U5 Renesas Electronics America, M30873FHGP#U5 Datasheet - Page 365

• Manufacturer Part Number: M30873FHGP#U5
• Description: IC M32C/87 MCU FLASH 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30873FHGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 341 of 587
Figure 22.18
[ When the 2(n+1) divider selects no division]
[ When the 2(n+1) divider selects no division]
Input waveform
(1) When the base timer is reset while count value is incremented
Input waveform
(2) When the base timer is reset while count value is decremented
Input waveform
NOTES:
1. The width requires 1.5 or more fBT1 clock cycles.
2. The IPSA_0 bit in the IPSA register determines two-phase pulse input pins, whether P8_0 and P8_1 or P7_6 and P7_7.
fBT1
fBT1
Base Timer Operation in Two-Phase Pulse Signal Processing Mode (Group 1)
P8_0 (P7_6)
(A phase)
P8_1 (P7_7)
(B phase)
P8_0 (P7_6)
(A phase)
P8_1 (P7_7)
(B phase)
INT1 (Z Phase)
Count value
P8_0 (P7_6)
(A phase)
P8_1 (P7_7)
(B phase)
INT1 (Z Phase)
Count value
(2)
(2)
(2)
(2)
(2)
(2)
"H"
“H”
“H”
“H”
“H”
“H”
“H”
"L"
“L”
“L”
“L”
“L”
“L”
“L”
“H”
“L”
Timer increments at all edges
m
m
(Note1)
(Note1)
Min. 1 μ s
Min. 1 μ s
m+1
m-1
Becomes 0 in
this timing
Becomes 0 in
this timing
Min. 1 μ s
Min. 1 μ s
Timer decrements at all edges
0
0
The base timer starts counting
The base timer starts counting
Becomes 1 in
this timing
Becomes FFFFh in
this timing
FFFFh FFFEh
1
2
22. Intelligent I/O (Base Timer)