MCF5272CVM66J Freescale Semiconductor, MCF5272CVM66J Datasheet - Page 282

• Manufacturer Part Number: MCF5272CVM66J
• Description: IC MCU 166MHZ 196MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVM66J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Cpu Speed: 66MHz
• Embedded Interface Type: EMI, ETHERNET, I2C, SPI, UART, USB
• Digital Ic Case Style: MAPBGA
• No. Of Pins: 196
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Universal Serial Bus (USB)
12-24
Bits
4
3
2
1
0
UNHALT
IN_EOP
IN_EOT
IN_LVL
Name
HALT
Table 12-14. EP0IMR and EP0ISR Field Descriptions (continued)
MCF5272 ColdFire
End of transfer. This bit is set when the end of a transfer has been reached for an IN endpoint.
An EOT interrupt is generated when a packet with a size less than the maximum packet size or
the first zero-length packet following maximum size packets is sent.
0 No interrupt pending
1 Transfer completed
End of packet. This bit is set when a packet has been sent successfully for endpoint 0 IN.
0 No interrupt pending
1 IN packet sent successfully
Unhalt. This bit is set when the endpoint 0 HALT_ST bit is cleared by a SETUP packet or USB
reset.
0 No interrupt pending
1 Endpoint halt cleared
Halt. This bit is set when the endpoint 0 HALT_ST bit is set due to a STALL response to the host.
0 No interrupt pending
1 Endpoint halted
IN FIFO threshold level. This bit indicates that the FIFO level has fallen below the level set in the
EPCTL0 register.
0 No interrupt pending
1 IN FIFO threshold level reached
®
Integrated Microprocessor User’s Manual, Rev. 3
Description
Freescale Semiconductor