MC9S12XEP100MAL Freescale Semiconductor, MC9S12XEP100MAL Datasheet - Page 325

IC MCU 16BIT 1M FLASH 112-LQFP

MC9S12XEP100MAL

Manufacturer Part Number
MC9S12XEP100MAL
Description
IC MCU 16BIT 1M FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100MAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
SPI, SSI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Operating Supply Voltage
- 0.3 V to + 6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
Table 8-31
tagged operations since the trigger occurs based on the tagged opcode reaching the execution stage of the
instruction queue. Thus these bits are ignored if tagged triggering is selected.
8.3.2.8.2
Read: Anytime. See
Write: If DBG not armed. See
Freescale Semiconductor
Address: 0x0029
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Bit[22:16]
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
COMPE
6–0
Field
SRC
W
R
1
0
shows the effect for RWE and RW on the comparison conditions. These bits are not useful for
Comparator Address High Compare Bits — The Comparator address high compare bits control whether the
selected comparator will compare the address bus bits [22:16] to a logic one or logic zero. This register byte is
ignored for XGATE compares.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
0
0
7
Debug Comparator Address High Register (DBGXAH)
Determines mapping of comparator to CPU12X or XGATE
0 The comparator is mapped to CPU12X buses
1 The comparator is mapped to XGATE address and data buses
Determines if comparator is enabled
0 The comparator is not enabled
1 The comparator is enabled for state sequence triggers or tag generation
RWE Bit
Figure 8-15. Debug Comparator Address High Register (DBGXAH)
Table 8-29
0
0
1
1
1
1
= Unimplemented or Reserved
Bit 22
0
6
Table 8-30. DBGXCTL Field Descriptions (continued)
Table 8-31. Read or Write Comparison Logic Table
RW Bit
Table 8-29
MC9S12XE-Family Reference Manual Rev. 1.23
for visible register encoding.
0
0
1
1
x
x
Table 8-32. DBGXAH Field Descriptions
Bit 21
5
0
RW Signal
for visible register encoding.
0
1
0
1
0
1
Bit 20
0
4
Description
Description
Bit 19
RW not used in comparison
RW not used in comparison
0
3
Comment
No match
No match
Chapter 8 S12X Debug (S12XDBGV3) Module
Write
Read
Bit 18
2
0
Bit 17
0
1
Bit 16
0
0
325

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