DF2268FA13 Renesas Electronics America, DF2268FA13 Datasheet - Page 249

• Manufacturer Part Number: DF2268FA13
• Description: IC H8S MCU FLASH 256K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of DF2268FA13

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 13MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2268FA13; HD64F2268FA13

2.2.65 (1)
SUB (SUBtract binary)
Operation
Rd – Rs
Assembly-Language Format
SUB.B Rs, Rd
Operand Size
Byte
Description
This instruction subtracts the contents of an 8-bit register Rs (source operand) from the contents of
an 8-bit register Rd (destination operand) and stores the result in the 8-bit register Rd.
Available Registers
Rd: R0L to R7L, R0H to R7H
Rs: R0L to R7L, R0H to R7H
Operand Format and Number of States Required for Execution
Register direct
Addressing
Mode
Rd
SUB (B)
Mnemonic
SUB.B
Operands
Rs, Rd
1st byte
1
8
Condition Code
H: Set to 1 if there is a borrow at bit 3;
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Set to 1 if an overflow occurs; otherwise
C: Set to 1 if there is a borrow at bit 7;
2nd byte
rs
Instruction Format
otherwise cleared to 0.
cleared to 0.
cleared to 0.
cleared to 0.
otherwise cleared to 0.
Rev. 4.00 Feb 24, 2006 page 233 of 322
—
I
rd
UI H
—
Section 2 Instruction Descriptions
3rd byte
—
U
N
4th byte
REJ09B0139-0400
Subtract Binary
Z
V
States
No. of
C
1