D12363VTE33V Renesas Electronics America, D12363VTE33V Datasheet - Page 191

• Manufacturer Part Number: D12363VTE33V
• Description: IC H8S/2363 MCU ROMLESS 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12363VTE33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

2.2.51 (5)
ROTL (ROTate Left)
Operation
ERd (left rotation)
Assembly-Language Format
ROTL.L ERd
Operand Size
Longword
Description
This instruction rotates the bits in a 32-bit register ERd (destination operand) one bit to the left.
The most significant bit (bit 31) is rotated to the least significant bit (bit 0), and also copied to the
carry flag.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Notes
Register direct
Addressing
Mode
ROTL (L)
Mnemonic
ROTL.L
C
ERd
Operands
MSB
b31
ERd
1st byte
. . . . . .
1
2
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 31.
2nd byte
B
Instruction Format
cleared to 0.
cleared to 0.
Rev. 4.00 Feb 24, 2006 page 175 of 322
—
I
0 erd
UI H
—
Section 2 Instruction Descriptions
—
3rd byte
LSB
b0
—
U
N
4th byte
REJ09B0139-0400
Z
V
0
States
No. of
C
Rotate
1