DF36054FPJ Renesas Electronics America, DF36054FPJ Datasheet - Page 535
![MCU 3/5V 32K J-TEMP 64-QFP](/photos/28/61/286100/64-lqfp__plqp0064kb-a_sml.jpg)
DF36054FPJ
Manufacturer Part Number
DF36054FPJ
Description
MCU 3/5V 32K J-TEMP 64-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.DF36057GFZV.pdf
(594 pages)
Specifications of DF36054FPJ
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F36054FPJ
HD64F36054FPJ
HD64F36054FPJ
- Current page: 535 of 594
- Download datasheet (4Mb)
8. Block Transfer Instructions
Notes: 1. The number of states in cases where the instruction code and its operands are located
EEPMOV
EEPMOV. B
EEPMOV. W
2. n is the value set in register R4L or R4.
in on-chip memory is shown here. For other cases, see appendix A.3, Number of
Execution States.
(1) Set to 1 when a carry or borrow occurs at bit 11; otherwise cleared to 0.
(2) Set to 1 when a carry or borrow occurs at bit 27; otherwise cleared to 0.
(3) Retains its previous value when the result is zero; otherwise cleared to 0.
(4) Set to 1 when the adjustment produces a carry; otherwise retains its previous value.
(5) The number of states required for execution of an instruction that transfers data in
(6) Set to 1 when the divisor is negative; otherwise cleared to 0.
(7) Set to 1 when the divisor is zero; otherwise cleared to 0.
(8) Set to 1 when the quotient is negative; otherwise cleared to 0.
Mnemonic
synchronization with the E clock is variable.
—
—
Instruction Length (bytes)
Addressing Mode and
4
4
if R4L
until
else next
if R4
until
else next
repeat @R5
repeat @R5
0 then
Operation
0 then
Rev. 4.00 Mar. 15, 2006 Page 501 of 556
R5+1
R6+1
R4L–1
R4L=0
R5+1
R6+1
R4–1
R4=0
@R6
@R6
R4
R5
R6
R5
R6
R4L
—
—
I
Condition Code
—
—
H
—
—
N
REJ09B0026-0400
—
—
Z
—
—
V
—
— 8+
C
Appendix
4n
4n
States
8+
No. of
*2
*2
*1
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