M308A5SGP#U5 Renesas Electronics America, M308A5SGP#U5 Datasheet
![MCU ROMLESS 12K RAM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
M308A5SGP#U5
Specifications of M308A5SGP#U5
Available stocks
Related parts for M308A5SGP#U5
M308A5SGP#U5 Summary of contents
Page 1
To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...
Page 2
All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...
Page 3
M32C/8A Group RENESAS MCU 1. Overview 1.1 Features The M32C/8A Group is a single-chip control MCU, fabricated using high-performance silicon gate CMOS technology, embedding the M32C/80 Series CPU core. The M32C/8A Group is housed in 144-pin and 100-pin plastic molded ...
Page 4
M32C/8A Group Table 1.1 Specifications (144-Pin Package) (1/2) Item Function CPU Central processing unit Memory ROM, RAM Power Supply Voltage Detection External Bus / memory expansion Bus function Expansion Clock Clock generation circuits • 4 circuits: Interrupts Watchdog Timer DMA ...
Page 5
M32C/8A Group Table 1.2 Specifications (144-Pin Package) (2/2) Item Function Serial UART0 to UART4 Interface A/D Converter D/A Converter CRC Calculation Circuit X/Y Converter I/O Ports Programmable I/O ports • Input only: 1 Operating Frequency / Supply Voltage Current Consumption ...
Page 6
M32C/8A Group Table 1.3 Specifications (100-Pin Package) (1/2) Item Function CPU Central processing unit Memory ROM, RAM Power Supply Voltage Detection External Bus / memory expansion Bus function Expansion Clock Clock generation circuits • 4 circuits: Interrupts Watchdog Timer DMA ...
Page 7
M32C/8A Group Table 1.4 Specifications (100-Pin Package) (2/2) Item Function Serial UART0 to UART4 Interface A/D Converter D/A Converter CRC Calculation Circuit X/Y Converter I/O Ports Programmable I/O ports • Input only: 1 Operating Frequency / Supply Voltage Current Consumption ...
Page 8
M32C/8A Group 1.2 Product List Table 1.5 lists product information. Figure 1.1 shows product numbering system. Table 1.5 Product List Part Number M308A0SGP PLQP0100KB-A (100P6Q-A) M308A3SGP PLQP0100KB-A (100P6Q-A) M308A5SGP PLQP0144KA-A (144P6Q-A) Part No. M30 Figure 1.1 ...
Page 9
M32C/8A Group 1.3 Block Diagram Figure 1.2 shows a block diagram of the M32C/8A Group (2) (2) Port P0 Port P1 Internal peripheral functions Timers (16-bit) Output (timer A): 5 Input (timer B): 6 Three-phase motor control circuit ...
Page 10
M32C/8A Group 1.4 Pin Assignments Figures 1.3 and 1.4 show pin assignments (top view P1_0 109 D7 / P0_7 110 D6 / P0_6 111 D5 / P0_5 112 D4 / P0_4 113 P11_4 114 P11_3 115 P11_2 116 ...
Page 11
M32C/8A Group Table 1.6 144-Pin Package List of Pin Names (1/3) Pin Control Pin Port Interrupt Pin No. 1 P9_6 2 P9_5 3 P9_4 4 P9_3 5 P9_2 6 P9_1 7 P9_0 8 P14_6 9 P14_5 10 P14_4 11 P14_3 ...
Page 12
M32C/8A Group Table 1.7 144-Pin Package List of Pin Names (2/3) Pin Control Pin Port Interrupt Pin No. 51 P13_4 52 P5_7 53 P5_6 54 P5_5 55 P5_4 56 P13_3 57 VSS 58 P13_2 59 VCC2 60 P13_1 61 P13_0 ...
Page 13
M32C/8A Group Table 1.8 144-Pin Package List of Pin Names (3/3) Pin Control Pin Port Interrupt Pin No. 101 P2_0 102 P1_7 INT5 103 P1_6 INT4 104 P1_5 INT3 105 P1_4 106 P1_3 107 P1_2 108 P1_1 109 P1_0 110 ...
Page 14
M32C/8A Group P1_1 P1_0 P0_7 P0_6 P0_5 P0_4 P0_3 P0_2 P0_1 85 D0 ...
Page 15
M32C/8A Group Table 1.9 100-Pin Package List of Pin Names (1/2) Pin Control Pin Port Interrupt Pin No. 1 P9_4 2 P9_3 3 P9_2 4 P9_1 5 P9_0 6 BYTE 7 CNVSS 8 XCIN P8_7 9 XCOUT P8_6 10 RESET ...
Page 16
M32C/8A Group Table 1.10 100-Pin Package List of Pin Names (2/2) Pin Control Pin Port Interrupt Pin No. 51 P4_1 52 P4_0 53 P3_7 54 P3_6 55 P3_5 56 P3_4 57 P3_3 58 P3_2 59 P3_1 60 VCC2 61 P3_0 ...
Page 17
M32C/8A Group 1.5 Pin Functions Table 1.11 Pin Functions (100-Pin and 144-Pin Packages) (1/3) Item Pin Name Power supply VCC1,VCC2 VSS Analog power AVCC supply input AVSS Reset input RESET CNVSS CNVSS External data BYTE bus width select input Bus ...
Page 18
M32C/8A Group Table 1.12 Pin Functions (100-Pin and 144-Pin Packages) (2/3) Item Pin Name Main clock XIN input Main clock XOUT output Sub clock XCIN input Sub clock XCOUT output BCLK output BCLK Clock output CLKOUT INT interrupt INT0 to ...
Page 19
M32C/8A Group Table 1.13 Pin Functions (100-Pin and 144-Pin Packages) (3/3) Item Pin Name Reference VREF voltage input A/D converter AN_0 to AN_7 ADTRG ANEX0 ANEX1 D/A converter DA0, DA1 I/O port P0_0 to P0_7, P1_0 to P1_7, P2_0 to ...
Page 20
M32C/8A Group 2. Central Processing Unit (CPU) Figure 2.1 shows the CPU registers. The register bank is comprised of eight registers (R0, R1, R2, R3, A0, A1, SB, and FB) out of 28 CPU registers. There are two sets of ...
Page 21
M32C/8A Group 2.1 General Registers 2.1.1 Data Registers (R0, R1, R2, and R3) R0, R1, R2, and R3 are 16-bit registers for transfer, arithmetic and logic operations. R0 and R1 can be split into high-order (R0H/R1H) and low-order bits (R0L/R1L) ...
Page 22
M32C/8A Group 2.1.8.7 Interrupt Enable Flag (I) The I flag enables maskable interrupts. Interrupts are disabled when the I flag is set to 0 and enabled when it is set to 1. The I flag becomes 0 when an interrupt ...
Page 23
M32C/8A Group 3. Memory Figure 3.1 shows a memory map of the M32C/8A Group. The M32C/8A Group has 16-Mbyte address space from addresses 000000h to FFFFFFh. The fixed interrupt vectors are allocated in addresses FFFFDCh to FFFFFFh. They store the ...
Page 24
M32C/8A Group 4. Special Function Registers (SFRs) Special Function Registers (SFRs) are the control registers of peripheral functions. Tables 4.1 to 4.11 list SFR address maps. Table 4.1 SFR Address Map (1/11) Address 0000h 0001h 0002h 0003h 0004h Processor Mode ...
Page 25
M32C/8A Group Table 4.2 SFR Address Map (2/11) Address 0030h 0031h 0032h 0033h 0034h 0035h 0036h 0037h 0038h 0039h Address Match Interrupt Register 6 003Ah 003Bh 003Ch 003Dh Address Match Interrupt Register 7 003Eh 003Fh 0040h 0041h 0042h 0043h 0044h ...
Page 26
M32C/8A Group Table 4.3 SFR Address Map (3/11) Address 0060h 0061h 0062h 0063h 0064h 0065h 0066h 0067h 0068h DMA0 Interrupt Control Register 0069h Timer B5 Interrupt Control Register 006Ah DMA2 Interrupt Control Register 006Bh UART2 Receive/ACK Interrupt Control Register 006Ch ...
Page 27
M32C/8A Group Table 4.4 SFR Address Map (4/11) Address 0090h UART0 Transmit/NACK Interrupt Control Register 0091h UART1/UART4 Bus Conflict Detection Interrupt Control Register 0092h UART1 Transmit/NACK Interrupt Control Register 0093h Key Input Interrupt Control Register 0094h Timer B0 Interrupt Control ...
Page 28
M32C/8A Group Table 4.5 SFR Address Map (5/11) Address 02C0h X0 Register, Y0 Register 02C1h 02C2h X1 Register, Y1 Register 02C3h 02C4h X2 Register, Y2 Register 02C5h 02C6h X3 Register, Y3 Register 02C7h 02C8h X4 Register, Y4 Register 02C9h 02CAh ...
Page 29
M32C/8A Group Table 4.6 SFR Address Map (6/11) Address 02F0h 02F1h 02F2h 02F3h 02F4h UART4 Special Mode Register 4 02F5h UART4 Special Mode Register 3 02F6h UART4 Special Mode Register 2 02F7h UART4 Special Mode Register 02F8h UART4 Transmit/Receive Mode ...
Page 30
M32C/8A Group Table 4.7 SFR Address Map (7/11) Address 0320h 0321h 0322h 0323h 0324h UART3 Special Mode Register 4 0325h UART3 Special Mode Register 3 0326h UART3 Special Mode Register 2 0327h UART3 Special Mode Register 0328h UART3 Transmit/Receive Mode ...
Page 31
M32C/8A Group Table 4.8 SFR Address Map (8/11) Address 0350h Timer B0 Register 0351h 0352h Timer B1 Register 0353h 0354h Timer B2 Register 0355h 0356h Timer A0 Mode Register 0357h Timer A1 Mode Register 0358h Timer A2 Mode Register 0359h ...
Page 32
M32C/8A Group Table 4.9 SFR Address Map (9/11) Address 0380h A/D0 Register 0 0381h 0382h A/D0 Register 1 0383h 0384h A/D0 Register 2 0385h 0386h A/D0 Register 3 0387h 0388h A/D0 Register 4 0389h 038Ah A/D0 Register 5 038Bh 038Ch ...
Page 33
M32C/8A Group Table 4.10 SFR Address Map (10/11) Address 03A0h 03A1h 03A2h 03A3h 03A4h 03A5h 03A6h 03A7h 03A8h 03A9h 03AAh 03ABh 03ACh 03ADh 03AEh 03AFh Function Select Register C 03B0h Function Select Register A0 03B1h Function Select Register A1 03B2h ...
Page 34
M32C/8A Group Table 4.11 SFR Address Map (11/11) Address (1) 03D0h Port P14 Register (1) 03D1h Port P15 Register 03D2h Port P14 Direction Register 03D3h Port P15 Direction Register 03D4h 03D5h 03D6h 03D7h 03D8h 03D9h 03DAh Pull-Up Control Register 2 ...
Page 35
M32C/8A Group 5. Electrical Characteristics Table 5.1 Absolute Maximum Ratings Symbol VCC1, Supply voltage VCC2 VCC2 Supply voltage AVCC Analog supply voltage VI Input voltage RESET, CNVSS, BYTE, P6_0 to P6_7, P7_2 to P7_7, P8_0 to P8_7, P9_0 to P9_7, ...
Page 36
M32C/8A Group Table 5.2 Recommended Operating Conditions (1/3) (VCC1 = VCC2 = 3.0 to 5.5 V, Topr = -20 to 85°C unless otherwise specified) Symbol Supply voltage (VCC1 ≥ VCC2) VCC1, VCC2 AVCC Analog supply voltage VSS Supply voltage AVSS ...
Page 37
M32C/8A Group Table 5.3 Recommended Operating Conditions (2/3) (VCC1 = VCC2 = 3.0 to 5.5 V, Topr = -20 to 85°C unless otherwise specified) Symbol Peak output P0_0 to P0_7, P1_0 to P1_7, P2_0 to P2_7, IOH(peak) high “H” P3_0 ...
Page 38
M32C/8A Group Table 5.4 Recommended Operating Conditions (3/3) (VCC1 = VCC2 = 3.0 to 5.5 V, Topr = -20 to 85°C unless otherwise specified) Symbol f(CPU) CPU clock frequency (same frequency as f(BCLK)) f(XIN) Main clock input frequency f(XCIN) Sub ...
Page 39
M32C/8A Group Table 5.5 Electrical Characteristics (1/3) (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C, f(CPU MHz unless otherwise specified) Symbol VOH Output P0_0 to P0_7, P1_0 to P1_7, ...
Page 40
M32C/8A Group Table 5.6 Electrical Characteristics (2/3) (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C, f(CPU MHz unless otherwise specified) Symbol IIH Input high P0_0 to P0_7, P1_0 to ...
Page 41
M32C/8A Group Table 5.7 Electrical Characteristics (3/3) (VCC1 = VCC2 = 5.5 V, VSS = 0 V, Topr = 25°C Symbol Parameter ICC Power ROMless supply version current REJ03B0213-0111 Rev.1.11 Mar 31, 2009 Page Condition f(CPU) = ...
Page 42
M32C/8A Group Table 5.8 A/D Conversion Characteristics (VCC1 = VCC2 = AVCC = VREF = 4.2 to 5.5 V, VSS = AVSS = 0 V, Topr = -20 to 85°C, f(CPU) = 32MHz unless otherwise specified) Symbol Parameter − Resolution ...
Page 43
M32C/8A Group Table 5.10 Voltage Detection Circuit Electrical Characteristics (VCC1 = VCC2 = 3.0 to 5.5 V, VSS = 0 V, Topr = 25°C unless otherwise specified) Symbol Vdet4 Vdet4 detection voltage Vdet3 Vdet3 detection voltage Vdet3s Hardware reset 2 ...
Page 44
M32C/8A Group Timing Requirements (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.12 External Clock Input Symbol tc External clock input cycle time tw(H) External clock input ...
Page 45
M32C/8A Group Timing Requirements (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.17 Timer A Input (Counter Increment/Decrement Input in Event Counter Mode) Symbol tc(UP) TAiOUT input ...
Page 46
M32C/8A Group Timing Requirements (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.22 A/D Trigger Input Symbol tc(AD) ADTRG input cycle time (required for trigger) tw(ADL) ADTRG ...
Page 47
M32C/8A Group Timing Requirements (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.25 Microprocessor Mode Symbol Data input access time (RD standard) tac1(RD-DB) Data input access time ...
Page 48
M32C/8A Group Switching Characteristics (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.26 Microprocessor Mode (when accessing external memory space) Symbol Address output delay time td(BCLK-AD) Address ...
Page 49
M32C/8A Group Switching Characteristics (VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.27 Microprocessor Mode (when accessing external memory space with multiplexed bus) Symbol Address output delay ...
Page 50
M32C/8A Group Figure 5 P15 Measurement Circuit REJ03B0213-0111 Rev.1.11 Mar 31, 2009 Page P10 P11 P12 P13 Note 1 P14 P15 NOTE: 1. ...
Page 51
M32C/8A Group XIN input TAiIN input TAiOUT input TAiOUT input (counter increment/ decrement select input) In event counter mode TAiIN input (count on falling edge) TAiIN input (count on rising edge) In event counter mode with two-phase pulse TAiIN input ...
Page 52
M32C/8A Group Microprocessor Mode BCLK RD (Separate bus) WR, WRL, WRH (Separate bus) RD (Multiplexed bus) WR, WRL, WRH (Multiplexed bus) RDY Input BCLK tsu(HOLD-BCLK) HOLD Input HLDA Output td(BCLK-HLDA) P0, P1, P2, P3, P4, P5_0 to P5_2 Measurement Conditions ...
Page 53
M32C/8A Group Microprocessor Mode (when accessing an external memory space) Read Timing (1φ + 1φ Bus Cycle) BCLK td(BCLK-CS) (1) 18ns.max CSi tcyc td(BCLK-AD) (1) 18ns.max ADi BHE td(BCLK-RD) RD DBi NOTES: 1. Values guaranteed only when the MCU is ...
Page 54
M32C/8A Group Microprocessor Mode (when accessing an external memory space with the multiplexed bus) Read Timing (2φ + 2φ Bus Cycle) BCLK td(BCLK-ALE) 18ns.max ALE td(BCLK-CS) 18ns.max CSi td(AD-ALE) ADi /DBi td(BCLK-AD) 18ns.max ADi BHE tac2(AD-DB) RD NOTES: 1. Varies ...
Page 55
M32C/8A Group Table 5.28 Electrical Characteristics (1/3) (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C, f(CPU MHz unless otherwise specified) Symbol VOH Output P0_0 to P0_7, P1_0 to P1_7, ...
Page 56
M32C/8A Group Table 5.29 Electrical Characteristics (2/3) (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C, f(CPU MHz unless otherwise specified) Symbol IIH Input high P0_0 to P0_7, P1_0 to ...
Page 57
M32C/8A Group Table 5.31 A/D Conversion Characteristics (VCC1 = VCC2 = AVCC = VREF = 3.0 to 3.6 V, VSS = AVSS = 0 V, Topr = -20 to 85°C, f(CPU) = 24MHz unless otherwise specified) Symbol Parameter − Resolution ...
Page 58
M32C/8A Group Timing Requirements (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified Table 5.33 External Clock Input Symbol tc External clock input cycle time tw(H) External clock input ...
Page 59
M32C/8A Group Timing Requirements (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified Table 5.38 Timer A Input (Counter Increment/Decrement Input in Event Counter Mode) Symbol tc(UP) TAiOUT input ...
Page 60
M32C/8A Group Timing Requirements (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.43 A/D Trigger Input Symbol tc(AD) ADTRG input cycle time (required for trigger) tw(ADL) ADTRG ...
Page 61
M32C/8A Group Timing Requirements (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.46 Microprocessor Mode Symbol Data input access time (RD standard) tac1(RD-DB) Data input access time ...
Page 62
M32C/8A Group Switching Characteristics (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.47 Microprocessor Mode (when accessing external memory space) Symbol Address output delay time td(BCLK-AD) Address ...
Page 63
M32C/8A Group Switching Characteristics (VCC1 = VCC2 = 3.0 to 3.6 V, VSS = 0 V, Topr = -20 to 85°C unless otherwise specified) Table 5.48 Microprocessor Mode (when accessing external memory space with multiplexed bus) Symbol Address output delay ...
Page 64
M32C/8A Group XIN input TAiIN input TAiOUT input TAiOUT input (counter increment/ decrement select input) In event counter mode TAiIN input (count on falling edge) TAiIN input (count on rising edge) In event counter mode with two-phase pulse TAiIN input ...
Page 65
M32C/8A Group Microprocessor Mode BCLK RD (Separate bus) WR, WRL, WRH (Separate bus) RD (Multiplexed bus) WR, WRL, WRH (Multiplexed bus) RDY Input BCLK tsu(HOLD-BCLK) HOLD Input HLDA Output td(BCLK-HLDA) P0, P1, P2, P3, P4, P5_0 to P5_2 Measurement Conditions ...
Page 66
M32C/8A Group Microprocessor Mode (when accessing an external memory space) Read Timing (1 φ φ Bus Cycle) BCLK td(BCLK-CS) 18ns.max CSi tcyc td(BCLK-AD) (1) 18ns.max ADi BHE td(BCLK-RD) RD DBi NOTES: 1. Values guaranteed only when the MCU ...
Page 67
M32C/8A Group Microprocessor Mode (when accessing an external memory space with the multiplexed bus) Read Timing (2φ φ Bus Cycle) BCLK td(BCLK-ALE) 18ns.max ALE td(BCLK-CS) 18ns.max CSi td(AD-ALE) ADi /DBi td(BCLK-AD) 18ns.max ADi BHE tac2(AD-DB) RD NOTES: 1. ...
Page 68
M32C/8A Group Appendix 1. Package Dimensions JEITA Package Code RENESAS Code P-LQFP144-20x20-0.50 PLQP0144KA 108 109 144 1 Z Index mark JEITA Package Code RENESAS Code P-LQFP100-14x14-0.50 PLQP0100KB ...
Page 69
REVISION HISTORY Rev. Date Page − 1.00 Apr 01, 2007 − 1.10 Jul 15, 2007 6 − 1.11 Mar 31, 2009 39,54 All trademarks and registered trademarks are the property of their respective ...
Page 70
Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained ...