C8051F010-GQR Silicon Laboratories Inc, C8051F010-GQR Datasheet

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C8051F010-GQR

Manufacturer Part Number
C8051F010-GQR
Description
IC 8051 MCU 32K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F01xr
Datasheets

Specifications of C8051F010-GQR

Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Analog Peripherals
10-Bit ADC
-
-
-
-
-
-
Two 12-Bit DACs
-
-
Two Comparators
-
-
Internal Voltage Reference
V
On-Chip JTAG Debug
-
-
-
-
Precision Mixed Signal
DD
±1 LSB INL; no missing codes
Programmable throughput up to 100 ksps
8 external inputs; programmable as single-ended or differential
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
Built-in temperature sensor (±3 °C)
Voltage output
10 µsec settling time
16 programmable hysteresis values
Configurable to generate interrupts or reset
On-chip emulation circuitry facilitates full-speed, non-intrusive, in-circuit
emulation
Supports breakpoints, single stepping, watchpoints, inspect/modify
memory, and registers
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Fully compliant with IEEE 1149.1 specification
Monitor/Brown-out Detector
XTAL1
XTAL2
AIN0.0
AIN0.1
AIN0.2
AIN0.3
AIN0.4
AIN0.5
AIN0.6
AIN0.7
DGND
DGND
DGND
AGND
AGND
VREF
DAC1
DAC0
CP0+
CP1+
VDD
VDD
VDD
TMS
TDO
CP0-
CP1-
TCK
RST
AV+
AV+
TDI
CP0
Analog Power
Digital Power
VREF
M
A
U
X
Oscillator
Oscillator
External
JTAG
Monitor
Internal
CP1
Logic
Circuit
VDD
(12-Bit)
(12-Bit)
DAC1
DAC0
SENSOR
TEMP
Prog
Gain
Boundary Scan
Debug HW
WDT
20 MIPS, 32 kB Flash, 10-Bit ADC, 64-Pin Mixed-Signal MCU
100 ksps
System Clock
(10-Bit)
Copyright © 2004 by Silicon Laboratories
ADC
Reset
C
8
0
5
1
o
e
r
SFR Bus
256 Byte
FLASH
32 kB
RAM
High-Speed 8051 µC Core
-
-
-
Memory
-
-
Digital Peripherals
-
-
-
-
-
Clock Sources
-
-
-
Supply Voltage: 2.7 to 3.6 V
-
-
64-Pin TQFP
Temperature Range: –40 to +85 °C
Pipelined instruction architecture; executes 70% of Instructions in 1 or 2
system clocks
Up to 20 MIPS throughput with 20 MHz clock
Expanded interrupt handler; up to 21 interrupt sources
256 bytes data RAM
32 kB Flash; in-system programmable in 512-byte sectors (512 bytes
are reserved)
32 port I/O; all are 5 V tolerant
Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports
available concurrently
Programmable 16-bit counter/timer array with five capture/compare
modules
4 general-purpose 16-bit counter/timers
Dedicated watchdog timer; bidirectional reset
Internal programmable oscillator: 2–16 MHz
External oscillator: Crystal, RC, C, or Clock
Can switch between clock sources on-the-fly
Typical operating current: 10 mA at 20 MHz
Multiple power saving sleep and shutdown modes
SPI Bus
Timer 3
SMBus
Timers
5-Chnl
UART
Port 0
Port 1
Port 2
Port 3
Latch
Latch
Latch
Latch
0,1,2
PCA
C
R
O
B
A
R
W
C
H
S
S
S
T
I
C8051F010
P
0
D
P
1
D
P
2
D
P
3
D
r
v
r
v
r
v
r
v
6.15.2004
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7

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C8051F010-GQR Summary of contents

Page 1

... Timers 8 0,1,2 FLASH 0 256 Byte Timer 3 5 Reset RAM Port 0 1 Latch Port 1 Latch C Port 2 o Latch r SFR Bus e Port 3 Latch ADC (10-Bit) Copyright © 2004 by Silicon Laboratories C8051F010 P0 P0.1 0 P0.2 R P0.3 D P0 P0 P1 P1.2 P1 ...

Page 2

... NOM MAX (mm) (mm) (mm 1.20 A1 0.05 - 0.15 A2 0.95 - 1.05 b 0.17 0.22 0. 12. 10. 0. 12. 10.00 - Copyright © 2004 by Silicon Laboratories C8051F010 TYP MAX UNITS 3 µ µA 2 µA 1 MHz SYSCLK/8 MHz SYSCLK/2 MHz bits ±1 LSB ±1 LSB 100 ksps ...

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