MC56F8346VFVER2 Freescale Semiconductor, MC56F8346VFVER2 Datasheet - Page 35
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MC56F8346VFVER2
Manufacturer Part Number
MC56F8346VFVER2
Description
IC HYBRID CTRLR 16BIT 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet
1.MC56F8346VFVE.pdf
(178 pages)
Specifications of MC56F8346VFVER2
Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
136KB (68K x 16)
Program Memory Type
FLASH
Ram Size
6K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Freescale Semiconductor
Preliminary
Signal Name
(GPIOC10)
FAULTA0
FAULTA1
FAULTA2
(GPIOC8)
(GPIOC9)
PWMA0
PWMA1
PWMA2
PWMA3
PWMA4
PWMA5
PWMB0
PWMB1
PWMB2
PWMB3
PWMB4
PWMB5
ISA0
ISA1
ISA2
Table 2-2 Signal and Package Information for the 144 Pin LQFP
Pin No.
113
114
115
62
64
65
67
68
70
71
73
74
34
35
36
39
40
41
Schmitt
Schmitt
Schmitt
Output
Output
Output
Input/
Type
Input
Input
disabled,
pull-up is
disabled,
pull-up is
output is
output is
In reset,
enabled
enabled
enabled
In reset,
enabled
During
pull-up
pull-up
56F8346 Technical Data, Rev. 15
Reset
Input,
Input,
State
PWMA0 - 5 — These are six PWMA outputs.
ISA0 - 2 — These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMA.
Port C GPIO — These three GPIO pins can be individually
programmed as input or output pins.
In the 56F8346, these pins default to ISA functionality after reset.
In the 56F8146, the default state is not one of the functions offered
and must be reconfigured.
To deactivate the internal pull-up resistor, clear the appropriate bit
of the GPIOC_PUR register. For details, see
FAULTA0 - 2 — These three fault input pins are used for disabling
selected PWMA outputs in cases where fault conditions originate
off-chip.
To deactivate the internal pull-up resistor, set the PWMA0 bit in the
SIM_PUDR register. For details, see
PWMB0 - 5 — Six PWMB output pins.
Signal Description
Part
6.5.8.
Part
6.5.8.
Signal Pins
35
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