R5F21257SDFP#U0 Renesas Electronics America, R5F21257SDFP#U0 Datasheet - Page 232
R5F21257SDFP#U0
Manufacturer Part Number
R5F21257SDFP#U0
Description
IC R8C/25 MCU FLASH 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Specifications of R5F21257SDFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21257SDFP#U0R5F21257SDFP#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
R5F21257SDFP#U0R5F21257SDFP#V2
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 14.62
14.3.7
TRDIOBi
TRDIOCi
TRDIODi
In PWM mode, a PWM waveform is output. Up to 3 PWM waveforms with the same period can be output by 1
channel. Also, up to 6 PWM waveforms with the same period can be output by synchronizing channels 0 and 1.
Since this mode functions by a combination of the TRDIOji (i = 0 or 1, j = B, C, or D) pin and TRDGRji
register, the PWM mode, or any other mode or function, can be selected for each individual pin. (However,
since the TRDGRAi register is used when using any pin for PWM mode, the TRDGRAi register cannot be used
for other modes.)
Figure 14.62 shows a Block Diagram of PWM Mode, and Table 14.27 lists the PWM Mode Specifications.
Figures 14.63 to 14.72 show the Registers Associated with PWM Mode, and Figures 14.73 and 14.74 show
Operating Examples of PWM Mode.
Feb 29, 2008
PWM Mode
Block Diagram of PWM Mode
i = 0 or 1
NOTES:
1. When the BFCi bit in the TRDMR register is set to 1 (the TRDGRCi register is used as the
2. When the BFDi bit in the TRDMR register is set to 1 (the TRDGRDi register is used as the
buffer register of the TRDGRAi register).
buffer register of the TRDGRBi register).
Output
control
Page 213 of 485
Compare match signal
Compare match signal
Compare match signal
Compare match signal
Comparator
Comparator
Comparator
Comparator
TRDGRAi
TRDGRBi
TRDGRCi
TRDGRDi
TRDi
(Note 1)
(Note 2)
14. Timers
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