MC9S12XET256MAA Freescale Semiconductor, MC9S12XET256MAA Datasheet - Page 685

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MC9S12XET256MAA

Manufacturer Part Number
MC9S12XET256MAA
Description
MCU 16BIT 256K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XET256MAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
59
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Package
80PQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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18.3.0.4
Read: Anytime
Write: Anytime
18.3.0.5
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0003
Module Base + 0x0004
PMUX[3:0]
PINTE[3:0]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
Field
3:0
3:0
W
W
R
R
PIT Multiplex Bits for Timer Channel 3:0 — These bits select if the corresponding 16-bit timer is connected to
micro time base 1 or 0. If PMUX is modified, the corresponding 16-bit timer is switched to the other micro time
base immediately.
0 The corresponding 16-bit timer counts with micro time base 0.
1 The corresponding 16-bit timer counts with micro time base 1.
PIT Time-out Interrupt Enable Bits for Timer Channel 3:0 — These bits enable an interrupt service request
whenever the time-out flag PTF of the corresponding PIT channel is set. When an interrupt is pending (PTF set)
enabling the interrupt will immediately cause an interrupt. To avoid this, the corresponding PTF flag has to be
cleared first.
0 Interrupt of the corresponding PIT channel is disabled.
1 Interrupt of the corresponding PIT channel is enabled.
PIT Multiplex Register (PITMUX)
PIT Interrupt Enable Register (PITINTE)
0
0
0
0
7
7
0
0
0
0
6
6
Figure 18-7. PIT Interrupt Enable Register (PITINTE)
Figure 18-6. PIT Multiplex Register (PITMUX)
MC9S12XE-Family Reference Manual Rev. 1.23
Table 18-6. PITINTE Field Descriptions
Table 18-5. PITMUX Field Descriptions
5
0
0
5
0
0
0
0
0
0
4
4
Description
Description
PINTE3
PMUX3
0
0
3
3
Chapter 18 Periodic Interrupt Timer (S12PIT24B4CV2)
PMUX2
PINTE2
2
0
2
0
PINTE1
PMUX1
0
0
1
1
PINTE0
PMUX0
0
0
0
0
685

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