MC908GZ32MFAE Freescale Semiconductor, MC908GZ32MFAE Datasheet - Page 295
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MC908GZ32MFAE
Manufacturer Part Number
MC908GZ32MFAE
Description
IC MCU 8BIT 32K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GZ60CFJE.pdf
(352 pages)
Specifications of MC908GZ32MFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1.5KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
CAN, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GZ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
CAN, ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GZ32MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908GZ32MFAE
Manufacturer:
FREESCALE
Quantity:
20 000
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MSxB — Mode Select Bit B
MSxA — Mode Select Bit A
Freescale Semiconductor
This read/write bit selects buffered output compare/PWM operation. MSxB exists only in the TIM2
channel 0, TIM2 channel 2, and TIM2 channel 4 status and control registers.
Setting MS0B disables the channel 1 status and control register and reverts T2CH1 pin to
general-purpose I/O.
Setting MS2B disables the channel 3 status and control register and reverts T2CH3 pin to
general-purpose I/O.
Setting MS4B disables the channel 5 status and control register and reverts T2CH5 pin to
general-purpose I/O.
Reset clears the MSxB bit.
When ELSxB:ELSxA ≠ 00, this read/write bit selects either input capture operation or unbuffered
output compare/PWM operation. (See
When ELSxB:ELSxA = 00, this read/write bit selects the initial output level of the T2CHx pin once
PWM, input capture, or output compare operation is enabled. (See
bit.
1 = Buffered output compare/PWM operation enabled
0 = Buffered output compare/PWM operation disabled
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
MSxB
X
X
0
0
0
0
0
0
0
1
1
1
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIM2 status and control register (T2SC).
MSxA
X
X
X
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
0
1
0
0
0
1
1
1
1
ELSxB
0
0
0
1
1
0
0
1
1
0
1
1
Table 19-2. Mode, Edge, and Level Selection
ELSxA
0
0
1
0
1
0
1
0
1
1
0
1
Table
Output compare
buffered PWM
Output preset
Input capture
compare or
Buffered
or PWM
output
Mode
19-2.)
NOTE
Pin under port control; initial output level high
Pin under port control; initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or falling edge
Software compare only
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Table
Configuration
19-2.) Reset clears the MSxA
I/O Registers
295
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