S9S08DZ128F2VLL Freescale Semiconductor, S9S08DZ128F2VLL Datasheet - Page 25
S9S08DZ128F2VLL
Manufacturer Part Number
S9S08DZ128F2VLL
Description
MCU 128K FLASH AUTO 100-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08DV96CLF.pdf
(458 pages)
Specifications of S9S08DZ128F2VLL
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
100-LQFP
Processor Series
S08D
Core
HCS08
Data Bus Width
8 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S08DZ128F2VLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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EXTAL
* The fixed frequency clock (FFCLK) is internally
synchronized to the bus clock and must not exceed one half
of the bus clock frequency.
1.3
Figure 1-2
inputs as shown. The clock inputs to the modules indicate the clock(s) that are used to drive the module
function.
The following are the clocks used in this MCU:
Freescale Semiconductor
MCG
XOSC
1 kHZ
LPO
•
•
•
•
•
•
•
•
•
•
XTAL
BUSCLK — The frequency of the bus is always half of MCGOUT.
LPO — Independent 1-kHz clock that can be selected as the source for the COP and RTC modules.
MCGOUT — Primary output of the MCG and is twice the bus frequency.
MCGLCLK — Development tools can select this clock source to speed up BDC communications
in systems where BUSCLK is configured to run at a very slow frequency.
MCGERCLK — External reference clock can be selected as the RTC clock source. It can also be
used as the alternate clock for the ADC and MSCAN.
MCGIRCLK — Internal reference clock can be selected as the RTC clock source.
MCGFFCLK — Fixed frequency clock can be selected as clock source for the TPMx.
TPM1CLK — External input clock source for TPM1.
TPM2CLK — External input clock source for TPM2.
TPM3CLK — External input clock source for TPM3.
System Clock Distribution
MCGERCLK
MCGIRCLK
MCGFFCLK
MCGOUT
MCGLCLK
shows a simplified clock connection diagram. Some modules in the MCU have selectable clock
CPU
÷
÷
2
2
BUSCLK
Figure 1-2. System Clock Distribution Diagram
RTC
MC9S08DZ128 Series Data Sheet, Rev. 1
COP
FFCLK*
BDC
TPM1CLK TPM2CLK
TPM1
TPM2
ADC has min and max
frequency requirements.
See the ADC chapter
and electricals appendix
for details.
TPM3CLK
TPM3
ADC
IIC1
IIC2
MSCAN
SCI1
Chapter 1 Device Overview
SCI2
FLASH
FLASH and EEPROM
have frequency
requirements for program
and erase operation. See
the electricals appendix
for details.
SPI1
EEPROM
SPI2
25
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