C8051F367-GM Silicon Laboratories Inc, C8051F367-GM Datasheet - Page 34

• Manufacturer Part Number: C8051F367-GM
• Description: IC 8051 MCU 32K FLASH 28-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F36xr

Specifications of C8051F367-GM

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 17x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F360DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 21-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 28QFN EP
• Device Core: 8051
• Family Name: C8051F36x
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1649

C8051F360/1/2/3/4/5/6/7/8/9
Table 3.1. Global Electrical Characteristics (Continued)
–40 to +85 °C, 25 MHz system clock unless otherwise specified.
Other electrical characteristics tables are found in the data sheet section corresponding to the associated
peripherals. For more information on electrical characteristics for a specific peripheral, refer to the page
indicated in Table 3.2.
34
Digital Supply Current—CPU Inactive (Idle Mode, not fetching instructions from Flash)
I
I
I
Digital Supply Current
(Stop Mode, shutdown)
Notes:
DD
DD
DD
2
1. SYSCLK must be at least 32 kHz to enable debugging.
2. SYSCLK is the internal device clock. For operational speeds in excess of 30 MHz, SYSCLK must be derived
3. Based on device characterization data; Not production tested.
4. IDD can be estimated for frequencies < 20 MHz by simply multiplying the frequency of interest by the frequency
5. Idle IDD can be estimated for frequencies < 1 MHz by simply multiplying the frequency of interest by the
Supply Sensitivity
Frequency Sensitivity
from the Phase-Locked Loop (PLL).
sensitivity number for that range. When using these numbers to estimate I
be the current at 25 MHz minus the difference in current indicated by the frequency sensitivity number. For
example: V
frequency sensitivity number for that range. When using these numbers to estimate Idle I
estimate should be the current at 25 MHz minus the difference in current indicated by the frequency sensitivity
number. For example: V
Parameter
DD
= 3.0 V; F = 20 MHz, I
3
3,5
DD
V
V
V
V
V
V
F = 25 MHz
F = 1 MHz
V
V
V
V
Oscillator not running,
V
= 3.0 V; F = 5 MHz, Idle I
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
= 3.6 V, F = 100 MHz
= 3.6 V, F = 25 MHz
= 3.0 V, F = 100 MHz
= 3.0 V, F = 25 MHz
= 3.0 V, F = 1 MHz
= 3.0 V, F = 80 kHz
= 3.0 V, F <= 1 MHz, T = 25
= 3.0 V, F > 1 MHz, T = 25
= 3.6 V, F <= 1 MHz, T = 25
= 3.6 V, F > 1 MHz, T = 25
Monitor Disabled
DD
= 15.9 mA - (25 MHz - 20 MHz) * 0.38 mA/MHz = 14 mA.
Conditions
Rev. 1.0
DD
= 7.2 mA - (25 MHz - 5 MHz) * 0.25 mA/MHz = 2.2 mA.
°
°
C
C
°
°
C
C
DD
for >20 MHz, the estimate should
Min
—
—
—
—
—
—
—
—
—
—
—
—
—
< 0.1
0.24
43.7
0.24
0.25
0.31
0.32
Typ
36
30
19
44
9
7
DD
for >1 MHz, the
Max
40
12
35
—
—
—
—
—
—
—
—
—
9
mA/MHz
mA/MHz
mA/MHz
mA/MHz
Units
%/V
%/V
mA
mA
mA
mA
mA
µA
µA