C8051F351-GMR Silicon Laboratories Inc, C8051F351-GMR Datasheet - Page 129

IC 8051 MCU 8K FLASH 28MLP

C8051F351-GMR

Manufacturer Part Number
C8051F351-GMR
Description
IC 8051 MCU 8K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F35xr
Datasheets

Specifications of C8051F351-GMR

Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x24b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F350DK
Minimum Operating Temperature
- 40 C
On-chip Adc
24 bit, 8 Channel
On-chip Dac
8 bit, 2 Channel
For Use With
336-1083 - DEV KIT FOR F350/351/352/353
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
17. Oscillators
C8051F350/1/2/3 devices include a programmable internal oscillator, an external oscillator drive circuit,
and a clock multiplier. The internal oscillator can be enabled/disabled and calibrated using the OSCICN
and OSCICL registers, as shown in Figure 17.1. The system clock (SYSCLK) can be derived from the
internal oscillator, external oscillator circuit, or the clock multiplier. The clock multiplier can produce three
possible outputs: Internal Oscillator x 2, External Oscillator x 2, or External Oscillator x 4. Oscillator electri-
cal specifications are given in Table 17.1 on page 136.
17.1. Programmable Internal Oscillator
All C8051F350/1/2/3 devices include a programmable internal oscillator that defaults as the system clock
after a system reset. The internal oscillator period can be programmed via the OSCICL register, shown in
SFR Definition 17.2. On C8051F350/1/2/3 devices, OSCICL is factory calibrated to obtain a 24.5 MHz fre-
quency.
Electrical specifications for the precision internal oscillator are given in Table 17.1 on page 136. Note that
the system clock may be derived from the programmed internal oscillator divided by 1, 2, 4, or 8, as
defined by the IFCN bits in register OSCICN. The divide value defaults to 8 following a reset.
VDD
Option 2
XTAL2
Option 1
Option 4
10MΩ
XTAL2
Option 3
XTAL2
XTAL1
XTAL2
Figure 17.1. Oscillator Diagram
OSCICL
Circuit
Input
Programmable
Internal Clock
Generator
OSCXCN
OSC
EN
Rev. 1.1
EXOSC / 2
OSCICN
IOSC
EXOSC
EXOSC
IOSC/2
CLKMUL
n
Clock Multiplier
x4
C8051F350/1/2/3
CLKSEL
SYSCLK
129

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