MC908AP16CFAE Freescale Semiconductor, MC908AP16CFAE Datasheet - Page 290
![IC MCU 16K FLASH 8MHZ 48-LQFP](/photos/19/7/190723/4134800_sml.jpg)
MC908AP16CFAE
Manufacturer Part Number
MC908AP16CFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets
1.MC908AP8CFBE.pdf
(324 pages)
2.MC908AP16ACFBER.pdf
(316 pages)
3.MC908AP16CFAE.pdf
(322 pages)
Specifications of MC908AP16CFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908AP16CFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908AP16CFAE
Manufacturer:
FREESCALE
Quantity:
20 000
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Break Module (BRK)
The following events can cause a break interrupt to occur:
When a CPU-generated address matches the contents of the break address registers, the break interrupt
is generated. A return-from-interrupt instruction (RTI) in the break routine ends the break interrupt and
returns the MCU to normal operation.
21.3.1 Flag Protection During Break Interrupts
The system integration module (SIM) controls whether or not module status bits can be cleared during
the break state. The BCFE bit in the break flag control register (BFCR) enables software to clear status
bits during the break state.
21.3.2 CPU During Break Interrupts
When the internal address bus matches the value written in the break address registers or when software
writes a 1 to the BRKA bit in the break status and control register, the CPU starts a break interrupt by:
The break interrupt timing is:
By updating a break address and clearing the BRKA bit in a break interrupt routine, a break interrupt can
be generated continuously.
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A CPU-generated address (the address in the program counter) matches the contents of the break
address registers.
Software writes a logic 1 to the BRKA bit in the break status and control register.
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC and $FFFD ($FEFC and $FEFD in monitor mode)
When a break address is placed at the address of the instruction opcode, the instruction is not
executed until after completion of the break interrupt routine.
When a break address is placed at an address of an instruction operand, the instruction is
executed before the break interrupt.
When software writes a 1 to the BRKA bit, the break interrupt occurs just before the next instruction
is executed.
IAB15–IAB0
Figure 21-2. Break Module Block Diagram
IAB15–IAB8
IAB7–IAB0
MC68HC908AP A-Family Data Sheet, Rev. 3
BREAK ADDRESS REGISTER HIGH
BREAK ADDRESS REGISTER LOW
Figure 21-2
8-BIT COMPARATOR
8-BIT COMPARATOR
shows the structure of the break module.
CONTROL
BREAK
Freescale Semiconductor
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