MC9S08RG32FGE Freescale Semiconductor, MC9S08RG32FGE Datasheet - Page 186

IC MCU 32K FLASH 8MHZ 44-LQFP

MC9S08RG32FGE

Manufacturer Part Number
MC9S08RG32FGE
Description
IC MCU 32K FLASH 8MHZ 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08RG32FGE

Core Processor
HCS08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Processor Series
S08RG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08RG60E
Minimum Operating Temperature
0 C
Controller Family/series
HCS08
No. Of I/o's
39
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08RG32FGE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S08RG32FGE
Manufacturer:
FREESCALE
Quantity:
20 000
Development Support
Figure 15-2
The host is asynchronous to the target so there is a 0-to-1 cycle delay from the host-generated falling edge
to where the target perceives the beginning of the bit time. Ten target BDC clock cycles later, the target
senses the bit level on the BKGD pin. Typically, the host actively drives the pseudo-open-drain BKGD pin
during host-to-target transmissions to speed up rising edges. Because the target does not drive the BKGD
pin during the host-to-target transmission period, there is no need to treat the line as an open-drain signal
during this period.
186
SYNCHRONIZATION
PERCEIVED START
(TARGET MCU)
BDC CLOCK
UNCERTAINTY
TRANSMIT 1
TRANSMIT 0
OF BIT TIME
HOST
HOST
shows an external host transmitting a logic 1 or 0 to the BKGD pin of a target HCS08 MCU.
Figure 15-2. BDC Host-to-Target Serial Bit Timing
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
TARGET SENSES BIT LEVEL
10 CYCLES
EARLIEST START
OF NEXT BIT
Freescale Semiconductor

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