MC9S08DV60ACLF Freescale Semiconductor, MC9S08DV60ACLF Datasheet - Page 240

• Manufacturer Part Number: MC9S08DV60ACLF
• Description: IC MCU 60K FLASH 3K RAM 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08DV60ACLF

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: S08DV
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 3 KB
• Interface Type: CAN, I2C, SCI, SPI
• Number Of Programmable I/os: 40
• Operating Supply Voltage: 5.5 V
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08DZ60
• On-chip Adc: 12 bit, 16 channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
Figure 12-23
identifiers. The mapping of standard identifiers into the IDR registers is shown in
All bits of the receive and transmit buffers are ‘x’ out of reset because of RAM-based implementation
All reserved or unused bits of the receive and transmit buffers always read ‘x’.
1. Exception: The transmit priority registers are 0 out of reset.
240
1
2
3
Not applicable for receive buffers
Read-only for CPU
Read-only for CPU
Address
0x00XA
0x00XB
0x00XC
0x00XD
0x00XE
0x00X0
0x00X1
0x00X2
0x00X3
0x00X4
0x00X5
0x00X6
0x00X7
0x00X8
0x00X9
0x00XF
Offset
shows the common 13-byte data structure of receive and transmit buffers for extended
Identifier Register 0
Identifier Register 1
Identifier Register 2
Identifier Register 3
Data Segment Register 0
Data Segment Register 1
Data Segment Register 2
Data Segment Register 3
Data Segment Register 4
Data Segment Register 5
Data Segment Register 6
Data Segment Register 7
Data Length Register
Transmit Buffer Priority Register
Time Stamp Register (High Byte)
Time Stamp Register (Low Byte)
Table 12-24. Message Buffer Organization
MC9S08DV60 Series Data Sheet, Rev 3
1
3
2
Register
Figure
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12-24.
1
.