MC9S12P96VFT Freescale Semiconductor, MC9S12P96VFT Datasheet - Page 239

• Manufacturer Part Number: MC9S12P96VFT
• Description: MCU 16BIT 96K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P96VFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.4.2
An example of startup of clock system from Reset is given in
7.4.3
An example of what happens going into Stop Mode and exiting Stop Mode after an interrupt is shown in
Figure
Freescale Semiconductor
LOCK
System
Reset
LOCK
SYNDIV
POSTDIV $03 (default target f
CPU
PLLCLK
PLLCLK
CPU
7-32. Disable PLL Lock interrupt (LOCKIE=0) before going into Stop Mode.
execution
f
VCORST
Startup from Reset
Stop Mode using PLLCLK as Bus Clock
$1F (default target f
reset state
768 cycles
) (
STOP instruction
Figure 7-32. Stop Mode using PLLCLK as Bus Clock
wakeup
Figure 7-31. Startup of clock system after Reset
PLL
VCO
S12P-Family Reference Manual, Rev. 1.13
=f
vector fetch, program execution
=64MHz)
VCO
/4 = 16MHz)
t
STP_REC
f
PLL
increasing
t
lock
interrupt
S12 Clock, Reset and Power Management Unit (S12CPMU)
t
lock
Figure
continue execution
f
7-31.
PLL
=16MHz
example change
of POSTDIV
$01
f
PLL
=32 MHz
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