CY8CLED04D01-56LTXI Cypress Semiconductor Corp, CY8CLED04D01-56LTXI Datasheet - Page 15

• Manufacturer Part Number: CY8CLED04D01-56LTXI
• Description: IC POWERPSOC 4CH 1A 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: PowerPSoC® CY8CLEDr

Specifications of CY8CLED04D01-56LTXI

• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: DALI, DMX512, I²C, IrDA, SPI, UART/USART
• Peripherals: LED, LVD, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Operating Supply Voltage: 7 V to 32 V
• Maximum Supply Current: 50 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 428-2882 - KIT STARTER POWERPSOC LIGHTING428-2281 - KIT EVAL POWERPSOC LIGHTING428-2271 - KIT EVAL COLOR-LOCK428-2270 - KIT STARTER DEMO LIGHTING770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2279

9.1.3 Hybrid Designs
You can begin in the system-level view, allow it to choose and
configure your user modules, routing, and generate code, then
switch to the chip-level view to gain complete control over
on-chip resources. All views of the project share a common code
editor, builder, and common debug, emulation, and programming
tools.
9.1.4 Code Generation Tools
PSoC Designer supports multiple third party C compilers and
assemblers. The code generation tools work seamlessly within
the PSoC Designer interface and have been tested with a full
range of debugging tools. The choice is yours.
Assemblers. The assemblers allow assembly code to merge
seamlessly with C code. Link libraries automatically use absolute
addressing or are compiled in relative mode, and linked with
other software modules to get absolute addressing.
C Language Compilers. C language compilers are available
that support the PowerPSoC family of devices. The products
allow you to create complete C programs for the PowerPSoC
family of devices.
The optimizing C compilers provide all the features of C tailored
to the PowerPSoC architecture. They come complete with
embedded libraries providing port and bus operations, standard
keypad and display support, and extended math functionality.
9.1.5 Debugger
The PSoC Designer Debugger subsystem provides hardware
in-circuit emulation, allowing you to test the program in a physical
system while providing an internal view of the PowerPSoC
device. Debugger commands allow the designer to read and
program and read and write data memory, read and write IO
registers, read and write CPU registers, set and clear break-
points, and provide program run, halt, and step control. The
debugger also allows the designer to create a trace buffer of
registers and memory locations of interest.
9.1.6 Online Help System
The online help system displays online, context-sensitive help
for the user. Designed for procedural and quick reference, each
functional subsystem has its own context-sensitive help. This
system also provides tutorials and links to FAQs and an Online
Support Forum to aid the designer in getting started.
9.2 In-Circuit Emulator
A low cost, high functionality ICE (In-Circuit Emulator) is
available for development support. This hardware has the
capability to program single devices.
The emulator consists of a base unit that connects to the PC by
way of a USB port. The base unit is universal and operates with
all PowerPSoC devices.
Document Number: 001-46319 Rev. *E
10. Designing with User Modules
The development process for the PowerPSoC device differs
from that of a traditional fixed function microprocessor. The
configurable power, analog, and digital hardware blocks give the
PowerPSoC architecture a unique flexibility that pays dividends
in managing specification change during development and by
lowering inventory costs. These configurable resources, called
PowerPSoC Blocks, have the ability to implement a wide variety
of user selectable functions. The PowerPSOC development
process can be summarized in the following four steps:
Select Components. In the chip-level view the components are
called “user modules”. User modules make selecting and imple-
menting peripheral devices simple and come in power, analog,
digital, and mixed signal varieties. The standard user module
library contains over 50 common peripherals such as Current
Sense Amplifiers, PrISM, PWM, DMM, Floating Buck, Boost,
ADCs, DACs, Timers, Counters, UARTs, and other not so
common peripherals such as DTMF generators and Bi-Quad
analog filter sections.
Configure Components. Each of the components selected
establishes the basic register settings that implement the
selected function. They also provide parameters allowing
precise configuration to your particular application. For example,
a PWM User Module configures one or more digital PSoC
blocks, one for each 8 bits of resolution. Configure the param-
eters and properties to correspond to your chosen application.
Enter values directly or by selecting values from drop-down
menus.
The chip-level user modules are documented in data sheets that
are viewed directly in PSoC Designer. These data sheets explain
the internal operation of the component and provide perfor-
mance specifications. Each data sheet describes the use of each
user module parameter and other information needed to
successfully implement your design.
Organize and Connect. Signal chains can be built at the chip
level by interconnecting user modules to each other and the IO
pins. In the chip-level view, perform the selection, configuration,
and routing so that you have complete control over the use of all
on-chip resources.
Generate, Verify, and Debug. When ready to test the hardware
configuration or move on to developing code for the project,
perform the “Generate Application” step. This causes PSoC
Designer to generate source code that automatically configures
the device to your specification and provides the high level user
module API functions.
The chip-level designs generate software based on your design.
The chip-level view provides application programming interfaces
(APIs) with high level functions to control and respond to
hardware events at run-time and interrupt service routines that
you can adapt as needed.
A complete code development environment allows development
and customization of your applications in C, assembly language,
or both.
1. Select Components
2. Configure Components
3. Organize and Connect
4. Generate, Verify and Debug
CY8CLED04G01, CY8CLED03G01
CY8CLED04D01, CY8CLED04D02
CY8CLED03D01, CY8CLED03D02
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