STM32F107VCT6 STMicroelectronics, STM32F107VCT6 Datasheet - Page 15

MCU ARM 256KB FLASH MEM 100-LQFP

STM32F107VCT6

Manufacturer Part Number
STM32F107VCT6
Description
MCU ARM 256KB FLASH MEM 100-LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F107VCT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, Ethernet, I²C, IrDA, LIN, SPI, UART/USART, USB OTG
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
80
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
STM32F107x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
CAN, I2C, SPI, USART
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
80
Number Of Timers
10
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit x 2, 16 Channel
On-chip Dac
12 bit x 2, 2 Channel
For Use With
497-10591 - DAUGHTER BOARD FOR STM32497-10064 - EVAL BOARD497-9040 - DEV KIT FOR STM32497-9041 - DEV KIT FOR STM32497-9042 - DEV KIT FOR STM32497-9043 - DEV KIT FOR STM32497-8924 - EVAL BOARD FOR STM32F107VCT497-8853 - BOARD DEMO STM32 UNIV USB-UUSCI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-8913

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STM32F105xx, STM32F107xx
2.3.9
2.3.10
2.3.11
2.3.12
Power supply schemes
Power supply supervisor
The device has an integrated power-on reset (POR)/power-down reset (PDR) circuitry. It is
always active, and ensures proper operation starting from/down to 2 V. The device remains
in reset mode when V
external reset circuit.
The device features an embedded programmable voltage detector (PVD) that monitors the
V
generated when V
than the V
message and/or put the MCU into a safe state. The PVD is enabled by software.
Voltage regulator
The regulator has three operation modes: main (MR), low power (LPR) and power down.
This regulator is always enabled after reset. It is disabled in Standby mode.
Low-power modes
The STM32F105xx and STM32F107xx connectivity line supports three low-power modes to
achieve the best compromise between low power consumption, short startup time and
available wakeup sources:
DD
/V
V
Provided externally through V
V
and PLL (minimum voltage to be applied to V
and V
V
registers (through power switch) when V
MR is used in the nominal regulation mode (Run)
LPR is used in the Stop modes.
Power down is used in Standby mode: the regulator output is in high impedance: the
kernel circuitry is powered down, inducing zero consumption (but the contents of the
registers and SRAM are lost)
Sleep mode
In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can
wake up the CPU when an interrupt/event occurs.
Stop mode
Stop mode achieves the lowest power consumption while retaining the content of
SRAM and registers. All clocks in the 1.8 V domain are stopped, the PLL, the HSI RC
and the HSE crystal oscillators are disabled. The voltage regulator can also be put
either in normal or in low-power mode.
The device can be woken up from Stop mode by any of the EXTI line. The EXTI line
source can be one of the 16 external lines, the PVD output, the RTC alarm or the USB
OTG FS wakeup.
DD
SSA
BAT
DDA
= 2.0 to 3.6 V: external power supply for I/Os and the internal regulator.
, V
= 1.8 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and backup
PVD
power supply and compares it to the V
SSA
DDA
threshold. The interrupt service routine can then generate a warning
must be connected to V
= 2.0 to 3.6 V: external analog power supplies for ADC, Reset blocks, RCs
DD
/V
DD
DDA
is below a specified threshold, V
drops below the V
Doc ID 15274 Rev 5
DD
pins.
DD
and V
DD
PVD
SS
is not present.
PVD
threshold and/or when V
DDA
, respectively.
threshold. An interrupt can be
is 2.4 V when the ADC is used). V
POR/PDR
, without the need for an
DD
/V
DDA
Description
is higher
15/101
DDA

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