Z8673312SSG Zilog, Z8673312SSG Datasheet - Page 51

• Manufacturer Part Number: Z8673312SSG
• Description: IC MICROCONTROLLER 8K 28-SOIC
• Manufacturer: Zilog
• Series: Z8®r

Specifications of Z8673312SSG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: EBI/EMI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: OTP
• Ram Size: 237 x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: Z8673x
• Core: Z80
• Data Bus Width: 8 bit
• Data Ram Size: 237 B
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3940; Z8673312SSG

PS022901-0508
(Upper Byte)
After RESET
(Lower Byte)
4096/8192/16384
4095/8191/16383
First Byte of
Location of
Instruction
Executed
Interrupt
Interrupt
Vector
Vector
65535
12
11
10
9
8
7
6
5
4
3
2
1
0
EPROM Protect. When in ROM Protect Mode, and executing out of External Program
Memory, instructions LDC, LDCI, LDE, and LDEI cannot read Internal Program Mem-
ory.
When in EPROM Protect Mode and executing out of Internal Program Memory, instruc-
tions LDC, LDCI, LDE, and LDEI can read Internal Program Memory.
Data Memory (DM). In ROM Mode, the Z86E43/743/E44 can address up to 60156/48
KB of external data memory beginning at location 4096/8192/16384. In ROMless mode,
the Z86E43/743/E44 can address up to 64 KB of data memory. External data memory may
be included with, or separated from, the external program memory space. DM, an optional
I/0 function that can be programmed to appear on pin P34, is used to distinguish between
data and program memory space
the type of instruction being executed. An LDC opcode references PROGRAM (DM inac-
tive) memory, and an LDE instruction references data (DM active Low) memory.
ROM and RAM
ROM Module
On-Chip
EPROM
External
IRQ5
IRQ5
IRQ4
IRQ4
IRQ3
IRQ3
IRQ2
IRQ2
IRQ1
IRQ1
IRQ0
IRQ0
Figure 22. Program Memory Map
(Figure
23). The state of the DM signal is controlled by
(Z86E43/743/E44 Only)
ROMLess Module
ROM and RAM
CMOS Z8
External
IRQ5
IRQ5
IRQ4
IRQ4
IRQ3
IRQ3
IRQ2
IRQ2
IRQ1
IRQ1
IRQ0
IRQ0
®
Product Specification
OTP Microcontrollers
Electrical Characteristics
47