Z8F1621VN020SC00TR Zilog, Z8F1621VN020SC00TR Datasheet - Page 82

• Manufacturer Part Number: Z8F1621VN020SC00TR
• Description: IC ENCORE MCU FLASH 16K 44PLCC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F1621VN020SC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Z8F1621VN020SC00T

Table 25. Interrupt Request 1 Register (IRQ1)
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
Interrupt Request 1 Register
PAD7I
7
T1I—Timer 1 Interrupt Request
0 = No interrupt request is pending for Timer 1.
1 = An interrupt request from Timer 1 is awaiting service.
T0I—Timer 0 Interrupt Request
0 = No interrupt request is pending for Timer 0.
1 = An interrupt request from Timer 0 is awaiting service.
U0RXI—UART 0 Receiver Interrupt Request
0 = No interrupt request is pending for the UART 0 receiver.
1 = An interrupt request from the UART 0 receiver is awaiting service.
U0TXI—UART 0 Transmitter Interrupt Request
0 = No interrupt request is pending for the UART 0 transmitter.
1 = An interrupt request from the UART 0 transmitter is awaiting service.
I
0 = No interrupt request is pending for the I
1 = An interrupt request from the I
SPII—SPI Interrupt Request
0 = No interrupt request is pending for the SPI.
1 = An interrupt request from the SPI is awaiting service.
ADCI—ADC Interrupt Request
0 = No interrupt request is pending for the Analog-to-Digital Converter.
1 = An interrupt request from the Analog-to-Digital Converter is awaiting service.
The Interrupt Request 1 (IRQ1) register
tored and polled interrupts. When a request is presented to the interrupt controller, the cor-
responding bit in the IRQ1 register becomes 1. If interrupts are globally enabled (vectored
interrupts), the interrupt controller passes an interrupt request to the eZ8 CPU. If interrupts
are globally disabled (polled interrupts), the eZ8 CPU can read the Interrupt Request 1
register to determine if any interrupt requests are pending.
2
CI— I
2
PAD6I
C Interrupt Request
6
PAD5I
5
PAD4I
2
4
C is awaiting service.
FC3H
R/W
(Table
0
2
C.
PAD3I
25) stores interrupt requests for both vec-
3
Z8 Encore! XP
PAD2I
2
Product Specification
PAD1I
1
®
Interrupt Controller
F64XX Series
PAD0I
0
68