ATSAM3U4EA-CU Atmel, ATSAM3U4EA-CU Datasheet - Page 314
![IC MCU 32BIT 256KB FLSH 144LFBGA](/photos/12/13/121356/144-lfbga_sml.jpg)
ATSAM3U4EA-CU
Manufacturer Part Number
ATSAM3U4EA-CU
Description
IC MCU 32BIT 256KB FLSH 144LFBGA
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U4EA-CU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
52K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
52 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, AT91SAM3U-EK, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Figure 21-6. Example of Partial Page Programming
21.3.3.3
21.3.3.4
314
X words
X words
X words
X words
SAM3U Series
Erase Commands
Lock Bit Protection
So Page Y erased
Erase All Flash
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
32-bit wide
Step 1.
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
...
...
...
...
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
By using the WP command, a page can be programmed in several steps if it has been erased
before (see
The Partial Programming mode works only with 128-bit (or higher) boundaries. It cannot be used
with boundaries lower than 128 bits (8, 16 or 32-bit for example).
Erase commands are allowed only on unlocked regions.
The erase sequence is:
Two errors can be detected in the EEFC_FSR register after a programming sequence:
Lock bits are associated with several pages in the embedded Flash memory plane. This defines
lock regions in the embedded Flash memory plane. They prevent writing/erasing protected
pages.
The lock sequence is:
• a Command Error: a bad keyword has been written in the EEFC_FCR register.
• a Lock Error: the page to be programmed belongs to a locked region. A command must be
• Erase starts as soon as one of the erase commands and the FARG field are written in the
• When the programming completes, the FRDY bit in the Flash Programming Status Register
• a Command Error: a bad keyword has been written in the EEFC_FCR register.
• a Lock Error: at least one page to be erased belongs to a locked region. The erase command
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
previously run to unlock the corresponding region.
Flash Command Register.
(EEFC_FSR) rises. If an interrupt has been enabled by setting the FRDY bit in EEFC_FMR,
the interrupt line of the NVIC is activated.
has been refused, no page has been erased. A command must be run previously to unlock
the corresponding region.
Figure
Programming of the second part of Page Y
21-6).
FF
FF
FF
CA FE
CA FE
CA FE
FF
FF
FF
FF
FF
FF
32-bit wide
FF
FF
FF
Step 2.
FF
FF
FF
FF
FF
FF
...
...
...
...
FF
FF
FF
CA
CA
CA
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FE
FE
FE
Programming of the third part of Page Y
FF
FF
FF
CA FE
CA FE
CA FE
DE CA
DE CA
DE CA
FF
FF
FF
32-bit wide
FF
FF
FF
FF
FF
FF
Step 3.
...
...
...
...
FF
FF
FF
CA
CA
CA
DE CA
DE CA
DE CA
FF
FF
FF
6430D–ATARM–25-Mar-11
FF
FF
FF
FE
FE
FE
FF
FF
FF
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