ATMEGA2561V-8AU Atmel, ATMEGA2561V-8AU Datasheet - Page 35
![IC AVR MCU 256K 8MHZ 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA2561V-8AU
Manufacturer Part Number
ATMEGA2561V-8AU
Description
IC AVR MCU 256K 8MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA2561V-8AU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA256x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
6
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA2561V-8AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
11.3
11.4
11.5
11.6
2549MS–AVR–09/10
Rev. 2549K-01/07
Rev. 2549J-09/06
Rev. 2549I-07/06
Rev. 2549H-06/06
1.
2.
3.
4.
5.
6:
7.
8.
9.
10.
1.
2.
3.
4.
5.
6.
1.
2.
3.
1.
2.
3.
Updated
Updated
Updated
Updated
Updated Assembly code example in
after setting the ACBG bit or enabling the ADC, the user must always
allow the reference to start up before the output from the Analog Compar-
ator or ADC is used. To reduce power consumption in Power-down mode,
the user can avoid the three conditions above to ensure that the reference
is turned off before entering Power-down mode.” on page
Updated
Updated Bit description in
on page
Updated code example in
Updated
Updated
Updated
Updated code example in
Boot Section” on page
Updated
Updated
Updated
Updated
Added
Updated
page
page
on page
Updated
Updated
Updated
Added
160,
131,
“Data Retention” on page
Table 30-1 on page
116.
189.
Table 1-1 on page
“Pin Descriptions” on page
“Stack Pointer” on page
“Bit 1 – EEPE: EEPROM Programming Enable” on page
“EIMSK – External Interrupt Mask Register” on page
Figure 25-8 on page
“DC Characteristics” on page
“” on page
“Timer/Counter Prescaler” on page
“Device Identification Register” on page
“Signature Bytes” on page
“Instruction Set Summary” on page
“Fast PWM Mode” on page
“” on page
“OSCCAL – Oscillator Calibration Register” on page
Table 15-3 on page
Table 19-3 on page
Table 16-2 on page
46.
46.
109.
ATmega640/1280/1281/2560/2561
“USART Initialization” on page
371.
“Moving Interrupts Between Application and
“PCIFR – Pin Change Interrupt Flag Register”
3.
284.
129,
187,
148,
11.
16.
Table 15-6 on page
Table 19-6 on page 188
Table 16-4 on page
338.
“Thus, when the BOD is not enabled,
150.
7.
367.
186.
415.
303.
130,
159,
210.
63.
and
Table 15-8 on
Table 16-5 on
115.
50.
Table 19-8
36.
35