ATSAM3U2EA-AU Atmel, ATSAM3U2EA-AU Datasheet - Page 52
![IC MCU 32BIT 128KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
ATSAM3U2EA-AU
Manufacturer Part Number
ATSAM3U2EA-AU
Description
IC MCU 32BIT 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U2EA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Controller Family/series
SAM3U
No. Of I/o's
96
Ram Memory Size
36KB
Cpu Speed
96MHz
No. Of Timers
3
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
36 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
12.8
12.9
12.10 Analog-to-Digital Converter (ADC)
12.10.1
52
High Speed Multimedia Card Interface (HSMCI)
USB High Speed Device Port (UDPHS)
SAM3U Series
12-bit High Speed ADC
Two ADCs are embedded in the product.
• Compatibility with MultiMedia Card Specification Version 4.3
• Compatibility with SD Memory Card Specification Version 2.0
• Compatibility with SDIO Specification Version V2.0.
• Compatibility with CE-ATA Specification 1.1
• Cards clock rate up to Master Clock divided by 2
• Boot Operation Mode support
• High Speed mode support
• Embedded power management to slow down clock rate when not used
• HSMCI has one slot supporting
• Support for stream, block and multi-block data read and write
• Supports Connection to DMA controller
• Built in FIFO (32 bytes) with large Memory Aperture Supporting Incremental access
• Support for CE-ATA Completion Signal Disable Command
• USB V2.0 high-speed compliant, 480 MBits per second
• Embedded USB V2.0 UTMI+ high-speed transceiver
• Embedded 4-Kbyte dual-port RAM for endpoints
• Embedded 6 channels DMA controller
• Suspend/Resume logic
• Up to 2 or 3 banks for isochronous and bulk endpoints
• Seven endpoints, configurable by software
• Maximum configuration: seven endpoints:
• 8-channel ADC
• 12-bit 1 Msamples/sec. Cyclic Pipeline ADC
• Integrated 8-to-1 multiplexer
• 12-bit resolution
– One MultiMediaCard bus (up to 30 cards) or
– One SD Memory Card
– One SDIO Card
– Minimizes Processor intervention for large buffer transfers
– Endpoint 0: 64 bytes, 1 bank mode
– Endpoint 1 & 2: 512 bytes, 2 banks mode, HS isochronous capable
– Endpoint 3 & 4:64 bytes, 3 banks mode
– Endpoint 5 & 6: 1024 bytes, 3 banks mode, HS isochronous capable
6430CS–ATARM–09-Apr-10