AT90USB1287-MU Atmel, AT90USB1287-MU Datasheet - Page 145

• Manufacturer Part Number: AT90USB1287-MU
• Description: IC AVR MCU 128K 64QFN
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB1287-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 64QFN EP
• Device Core: AVR
• Family Name: AT90
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AT90USB1287-16MU; AT90USB1287-16MU

14.10.8
14.10.9
14.10.10 Output Compare Register 1 B – OCR1BH and OCR1BL
14.10.11 Output Compare Register 1 C – OCR1CH and OCR1CL
14.10.12 Output Compare Register 3 A – OCR3AH and OCR3AL
7593K–AVR–11/09
Timer/Counter3 – TCNT3H and TCNT3L
Output Compare Register 1 A – OCR1AH and OCR1AL
The two Timer/Counter I/O locations (TCNTnH and TCNTnL, combined TCNTn) give direct
access, both for read and for write operations, to the Timer/Counter unit 16-bit counter. To
ensure that both the high and low bytes are read and written simultaneously when the CPU
accesses these registers, the access is performed using an 8-bit temporary High Byte Register
(TEMP). This temporary register is shared by all the other 16-bit registers.
Registers” on page 119.
Modifying the counter (TCNTn) while the counter is running introduces a risk of missing a com-
pare match between TCNTn and one of the OCRnx Registers.
Writing to the TCNTn Register blocks (removes) the compare match on the following timer clock
for all compare units.
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
TCNT1[15:8]
TCNT1[7:0]
R/W
0
7
TCNT3[15:8]
TCNT3[7:0]
R/W
0
7
OCR1A[15:8]
OCR1A[7:0]
R/W
0
7
OCR1B[15:8]
OCR1B[7:0]
R/W
0
7
OCR1C[15:8]
OCR1C[7:0]
R/W
0
7
OCR3A[15:8]
OCR3A[7:0]
R/W
0
R/W
0
6
R/W
0
6
R/W
0
6
R/W
0
6
R/W
0
6
R/W
0
R/W
0
5
R/W
0
5
R/W
0
5
R/W
0
5
R/W
0
5
R/W
0
R/W
0
4
R/W
0
4
R/W
0
4
R/W
0
4
R/W
0
4
R/W
0
0
3
0
3
0
3
0
3
0
3
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
2
R/W
0
2
R/W
0
2
R/W
0
2
R/W
0
2
R/W
0
R/W
0
1
R/W
0
1
R/W
0
1
R/W
0
1
R/W
0
1
R/W
0
AT90USB64/128
R/W
0
0
R/W
0
0
R/W
0
0
R/W
0
0
R/W
0
0
R/W
0
See “Accessing 16-bit
TCNT1H
TCNT1L
TCNT3H
TCNT3L
OCR1AH
OCR1AL
OCR1BH
OCR1BL
OCR1CH
OCR1CL
OCR3AH
OCR3AL
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