PIC18LF8621-I/PT Microchip Technology, PIC18LF8621-I/PT Datasheet - Page 170

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PIC18LF8621-I/PT

Manufacturer Part Number
PIC18LF8621-I/PT
Description
IC PIC MCU FLASH 32KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF8621-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
70
Eeprom Memory Size
1024Byte
Ram Memory Size
3840Byte
Cpu Speed
40MHz
No. Of Timers
5
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
MSSP, SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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PIC18F6525/6621/8525/8621
17.4.6
In half-bridge applications where all power switches are
modulated at the PWM frequency at all times, the
power switches normally require more time to turn off
than to turn on. If both the upper and lower power
switches are switched at the same time (one turned on
and the other turned off), both switches may be on for
a short period of time until one switch completely turns
off. During this brief interval, a very high current
(shoot-through current) may flow through both power
switches, shorting the bridge supply. To avoid this
potentially destructive shoot-through current from flow-
ing during switching, turning on either of the power
switches is normally delayed to allow the other switch
to completely turn off.
In the Half-Bridge Output mode, a digitally program-
mable dead-band delay is available to avoid
shoot-through current from destroying the bridge
power switches. The delay occurs at the signal
transition from the non-active state to the active state.
See Figure 17-4 for illustration. The lower seven bits of
the ECCPxDEL register (Register 17-2) set the delay
period in terms of microcontroller instruction cycles
(T
17.4.7
When an ECCP module is programmed for any PWM
mode, the active output pin(s) may be configured for
auto-shutdown. Auto-shutdown immediately places the
PWM output pin(s) into a defined shutdown state when
a shutdown event occurs.
REGISTER 17-2:
DS39612B-page 168
CY
or 4 T
OSC
bit 7
bit 6-0
PROGRAMMABLE DEAD-BAND
DELAY
ENHANCED PWM
AUTO-SHUTDOWN
).
ECCPxDEL: PWM CONFIGURATION REGISTER
bit 7
PxRSEN: PWM Restart Enable bit
1 = Upon Auto-Shutdown, the ECCPxASE bit clears automatically once the shutdown event
0 = Upon Auto-Shutdown, ECCPxASE must be cleared in software to restart the PWM
PxDC6:PxDC0: PWM Delay Count bits
Delay time, in number of F
a PWM signal to transition to active.
Legend:
R = Readable bit
-n = Value at POR
PxRSEN
R/W-0
goes away; the PWM restarts automatically
PxDC6
R/W-0
PxDC5
R/W-0
OSC
W = Writable bit
‘1’ = Bit is set
/4 (4 * T
PxDC4
R/W-0
OSC
A shutdown event can be caused by either of the two
comparator modules or the INT0/FLT0 pin (or any com-
bination of these three sources). The comparators may
be used to monitor a voltage input proportional to a cur-
rent being monitored in the bridge circuit. If the voltage
exceeds a threshold, the comparator switches state and
triggers a shutdown. Alternatively, a digital signal on the
INT0/FLT0 pin can also trigger a shutdown. The
auto-shutdown feature can be disabled by not selecting
any auto-shutdown sources. The auto-shutdown
sources
ECCP1AS2:ECCP1AS0
ECCP1AS register).
When a shutdown occurs, the output pin(s) are
asynchronously placed in their shutdown states,
specified
PSS1BD1:PSS1BD0 bits (ECCP1AS3:ECCP1AS0).
Each pin pair (P1A/P1C and P1B/P1D) may be set to
drive high, drive low or be tri-stated (not driving). The
ECCP1ASE bit (ECCP1AS<7>) is also set to hold the
Enhanced PWM outputs in their shutdown states.
The ECCP1ASE bit is set by hardware when a
shutdown event occurs. If automatic restarts are not
enabled, the ECCPASE bit is cleared by firmware when
the cause of the shutdown clears. If automatic restarts
are enabled, the ECCPASE bit is automatically cleared
when the cause of the Auto-Shutdown has cleared.
If the ECCPASE bit is set when a PWM period begins,
the PWM outputs remain in their shutdown state for that
entire PWM period. When the ECCPASE bit is cleared,
the PWM outputs will return to normal operation at the
beginning of the next PWM period.
Note:
) cycles, between the scheduled and actual time for
PxDC3
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
to
Writing to the ECCPASE bit is disabled
while a shutdown condition is active.
by
be
the
used
PxDC2
R/W-0
 2005 Microchip Technology Inc.
PSS1AC1:PSS1AC0
are
bits
x = Bit is unknown
selected
PxDC1
R/W-0
(bits<6:4>
using
PxDC0
R/W-0
of
bit 0
and
the
the

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