PIC17C766-33/PT Microchip Technology, PIC17C766-33/PT Datasheet - Page 216

• Manufacturer Part Number: PIC17C766-33/PT
• Description: IC MCU OTP 16KX16 A/D 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C766-33/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-TFQFP
• Processor Series: PIC17C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 902 B
• Interface Type: I2C, MSSP, RS- 232, SCI, SPI, USART
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ICE2000, DM173001
• Minimum Operating Temperature: 0 C
• On-chip Adc: 16 bit
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC17C7XX
MOVFP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS30289B-page 216
Before Instruction
After Instruction
Decode
REG1
REG2
REG1
REG2
Q1
register 'f'
Move f to p
[label]
0
0
(f)
None
Move data from data memory location ’f’
to data memory location ’p’. Location ’f’
can be anywhere in the 256 byte data
space (00h to FFh), while ’p’ can be 00h
to 1Fh.
Either ’p' or 'f' can be WREG (a useful,
special situation).
MOVFP is particularly useful for transfer-
ring a data memory location to a periph-
eral register (such as the transmit buffer
or an I/O port). Both 'f' and 'p' can be
indirectly addressed.
1
1
MOVFP
Read
011p
Q2
=
=
=
=
f
p
(p)
255
31
0x33,
0x11
0x33,
0x33
MOVFP f,p
REG1, REG2
pppp
Process
Data
Q3
ffff
register 'p'
Write
Q4
ffff
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
Move Literal to low nibble in BSR
[ label ]
0
k
None
The four-bit literal ’k’ is loaded in the
Bank Select Register (BSR). Only the
low 4-bits of the Bank Select Register
are affected. The upper half of the BSR
is unchanged. The assembler will
encode the “u” fields as '0'.
1
1
MOVLB
literal 'k'
Read
1011
Q2
=
=
k
(BSR<3:0>)
2000 Microchip Technology Inc.
15
0x22
0x25 (Bank 5)
5
MOVLB k
1000
Process
Data
Q3
uuuu
Write literal
BSR<3:0>
'k' to
Q4
kkkk