PIC17LC756A-08I/L Microchip Technology, PIC17LC756A-08I/L Datasheet - Page 226

IC MCU OTP 16KX16 A/D 68PLCC

PIC17LC756A-08I/L

Manufacturer Part Number
PIC17LC756A-08I/L
Description
IC MCU OTP 16KX16 A/D 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets

Specifications of PIC17LC756A-08I/L

Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Processor Series
PIC17LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
902 B
Interface Type
I2C, MSSP, RS- 232, SCI, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17LC756A-08I/L
Manufacturer:
MICROCHIP
Quantity:
3 000
Part Number:
PIC17LC756A-08I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC17C7XX
SUBWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example 1:
Example 2:
Example 3:
DS30289B-page 226
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG1
WREG
C
REG1
WREG
C
Z
REG1
WREG
C
REG1
WREG
C
Z
REG1
WREG
C
REG1
WREG
C
Z
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register 'f'
Subtract WREG from f
[ label ] SUBWF f,d
0
d
(f) – (W)
OV, C, DC, Z
Subtract WREG from register 'f' (2’s
complement method). If 'd' is 0, the
result is stored in WREG. If 'd' is 1, the
result is stored back in register 'f'.
1
1
SUBWF
Read
Q2
0000
3
2
?
1
2
1
0
2
2
?
0
2
1
1
1
2
?
FF
2
0
0
f
[0,1]
255
; result is positive
; result is zero
; result is negative
REG1, 1
010d
Process
dest)
Data
Q3
ffff
destination
Write to
Q4
ffff
SUBWFB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example 1:
Example2:
Example3:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG1
WREG
C
REG1
WREG
C
Z
REG1
WREG
C
REG1
WREG
C
Z
REG1
WREG
C
REG1
WREG
C
Z
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register 'f'
SUBWFB
SUBWFB
(f) – (W) – C
Subtract WREG from f with
Borrow
[ label ] SUBWFB f,d
0
d
OV, C, DC, Z
Subtract WREG and the carry flag
(borrow) from register 'f' (2’s comple-
ment method). If 'd' is 0, the result is
stored in WREG. If 'd' is 1, the result is
stored back in register 'f'.
1
1
SUBWFB
Read
Q2
0000
0x19
0x0D
1
0x0C
0x0D
1
0
0x1B
0x1A
0
0x1B
0x00
1
1
0x03
0x0E
1
0xF5
0x0E
0
0
f
[0,1]
2000 Microchip Technology Inc.
255
REG1,0
REG1,1
REG1, 1
001d
(0000 0011)
; result is positive
(0001 1001)
(0001 1011)
(0001 1010)
(0001 1011)
; result is zero
(0000 1101)
(1111 0100) [2’s comp]
(0000 1101)
; result is negative
(0000 1101)
(0000 1011)
(0000 1101)
Process
Data
Q3
dest)
ffff
destination
Write to
Q4
ffff

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