PIC18F6720T-I/PT Microchip Technology, PIC18F6720T-I/PT Datasheet - Page 151
![IC MCU FLASH 64KX16 W/AD 64-TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F6720T-I/PT
Manufacturer Part Number
PIC18F6720T-I/PT
Description
IC MCU FLASH 64KX16 W/AD 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F8520T-IPT.pdf
(380 pages)
3.PIC18F8520T-IPT.pdf
(40 pages)
4.PIC18F6620-IPT.pdf
(14 pages)
5.PIC18F6620-IPT.pdf
(12 pages)
Specifications of PIC18F6720T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.75 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
52
Number Of Timers
2 x 8 bit
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
For Use With
MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F6720T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F8520T-IPT PDF datasheet #2
- PIC18F8520T-IPT PDF datasheet #3
- PIC18F6620-IPT PDF datasheet #4
- PIC18F6620-IPT PDF datasheet #5
- Current page: 151 of 380
- Download datasheet (7Mb)
16.0
The PIC18FXX20 devices all have five CCP (Capture/
Compare/PWM) modules. Each module contains a
16-bit register, which can operate as a 16-bit Capture
register, a 16-bit Compare register or a Pulse Width
Modulation (PWM) Master/Slave Duty Cycle register.
Table 16-1 shows the timer resources of the CCP
module modes.
The operation of all CCP modules are identical, with
the exception of the special event trigger present on
CCP1 and CCP2.
REGISTER 16-1:
2004 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
(CCP) MODULES
bit 7-6
bit 5-4
bit 3-0
PIC18F6520/8520/6620/8620/6720/8720
CCPxCON REGISTER
bit 7
Unimplemented: Read as ‘0’
DCxB1:DCxB0: PWM Duty Cycle bit 1 and bit 0 for CCP Module x
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two Least Significant bits (bit 1 and bit 0) of the 10-bit PWM duty cycle. The
eight Most Significant bits (DCx9:DCx2) of the duty cycle are found in CCPRxL.
CCPxM3:CCPxM0: CCP Module x Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCPx module)
0001 = Reserved
0010 = Compare mode, toggle output on match (CCPxIF bit is set)
0011 = Reserved
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, Initialize CCP pin Low; on compare match, force CCP pin High
1001 = Compare mode, Initialize CCP pin High; on compare match, force CCP pin Low
1010 = Compare mode, Generate software interrupt on compare match (CCPIF bit is set,
1011 = Compare mode, trigger special event (CCPIF bit is set):
11xx = PWM mode
Legend:
R = Readable bit
- n = Value at POR
U-0
—
(CCPIF bit is set)
(CCPIF bit is set)
(CCP pin is unaffected)
For CCP1 and CCP2:
Timer1 or Timer3 is reset on event.
For all other modules:
CCPx pin is unaffected and is configured as an I/O port
(same as CCPxM<3:0> = 1010, above).
U-0
—
DCxB1
R/W-0
W = Writable bit
‘1’ = Bit is set
DCxB0
R/W-0
For the sake of clarity, CCP module operation in the
following sections is described with respect to CCP1.
The descriptions can be applied (with the exception of
the special event triggers) to any of the modules.
Note:
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCPxM3
R/W-0
Throughout this section, references to
register and bit names that may be associ-
ated with a specific CCP module are
referred to generically by the use of ‘x’ or
‘y’ in place of the specific module number.
Thus, “CCPxCON” might refer to the
control register for CCP1, CCP2, CCP3,
CCP4 or CCP5.
CCPxM2 CCPxM1 CCPxM0
R/W-0
x = Bit is unknown
R/W-0
DS39609B-page 149
R/W-0
bit 0
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