ATMEGA128-16AN Atmel, ATMEGA128-16AN Datasheet - Page 75

• Manufacturer Part Number: ATMEGA128-16AN
• Description: MCU AVR 128KB FLASH 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16AN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 4
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 8 Channel
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2467V–AVR–02/11
Table 31. Overriding Signals for Alternate Functions in PB7..PB4
Note:
Table 32. Overriding Signals for Alternate Functions in PB3..PB0
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
1. See
PB3/MISO
SPE • MSTR
PORTB3 • PUD
SPE • MSTR
0
SPE • MSTR
SPI SLAVE OUTPUT
0
0
SPI MSTR INPUT
–
ATmega103 compatibility mode.
“Output Compare Modulator (OCM1C2)” on page 160
PB7/OC2/OC1C
0
0
0
0
OC2/OC1C ENABLE
OC2/OC1C
0
0
–
–
(1)
PB2/MOSI
SPE • MSTR
PORTB2 • PUD
SPE • MSTR
0
SPE • MSTR
SPI MSTR OUTPUT
0
0
SPI SLAVE INPUT
–
(1)
PB6/OC1B
0
0
0
0
OC1B ENABLE
OC1B
0
0
–
–
PB1/SCK
SPE • MSTR
PORTB1 • PUD
SPE • MSTR
0
SPE • MSTR
SCK OUTPUT
0
0
SCK INPUT
–
PB5/OC1A
0
0
0
0
OC1A ENABLE
OC1A
0
0
–
–
for details. OC1C does not exist in
PB0/SS
SPE • MSTR
PORTB0 • PUD
SPE • MSTR
0
0
0
0
0
SPI SS
–
ATmega128
PB4/OC0
0
0
0
0
OC0 ENABLE
OC0B
0
0
–
–
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