PIC18F2585-I/SO Microchip Technology, PIC18F2585-I/SO Datasheet - Page 9

IC MCU FLASH 24KX16 28SOIC

PIC18F2585-I/SO

Manufacturer Part Number
PIC18F2585-I/SO
Description
IC MCU FLASH 24KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2585-I/SO

Core Size
8-Bit
Program Memory Size
48KB (24K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1024Byte
Ram Memory Size
3.25KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3-DB18F4680 - BOARD DAUGHTER ICEPIC3
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2585-I/SO
Manufacturer:
DIODES
Quantity:
34 000
Part Number:
PIC18F2585-I/SO
Quantity:
2
28. Module: MSSP
EXAMPLE 5:
29. Module: Reset
© 2007 Microchip Technology Inc.
When the MSSP is configured for SPI mode, the
Buffer Full Status bit, BF (SSPSTAT<0>), should
not be polled in software to determine when the
transfer is complete.
Work around
Copy the SSPSTAT register into a variable and
perform the bit test on the variable. In Example 5,
SSPSTAT is copied into the working register
where the bit test is performed.
A second option is to poll the Master Synchronous
Serial Port Interrupt Flag bit, SSPIF (PIR1<3>).
This bit can be polled and will set when the transfer
is complete.
Date Codes that pertain to this issue:
All engineering and production devices.
This version of silicon does not support the func-
tionality described in Note 1 of parameter D002 in
Section 27.1
Voltage” of the Device Data Sheet. The RAM
content may be altered during a Reset event if the
following conditions are met.
• Device is accessing RAM.
• Asynchronous Reset (i.e., WDT, BOR or MCLR
Work around
None.
Date Codes that pertain to this issue:
All engineering and production devices.
loop_MSB:
occurs when a write operation is being
executed (start of a Q4 cycle).
MOVF
BTFSS
BRA
“DC
SSPSTAT, W
WREG, BF
loop_MSB
Characteristics:
PIC18F2585/2680/4585/4680
Supply
30. Module: ECAN™ Technology
31. Module: ECAN™ Technology
32. Module: ECAN™ Technology
Under specific conditions, the first five bits of a
transmitted identifier may not match the value in
the Transmit Buffer ID register, TXBnSIDH. The
following conditions must exist for the corruption to
occur:
1. A transmit message must be pending.
2. The ECAN module must detect a Start-Of-
Work around
None.
Date Codes that pertain to this issue:
All engineering and production devices.
The Error Interrupt Flag, ERRIF (PIR3<5>), may
not be able to clear in software after either of the
following counter registers exceeds 127.
• Transmit Error Counter Register TXERRCNT
• Receive Error Counter Register RXERRCNT
Work around
Monitor the EWARN (COMSTAT<0>) bit to deter-
mine if either the TXERRCNT or the RXERRCNT
exceeds 95 and clear the ERRIF flag before either
counter reaches 127.
Date Codes that pertain to this issue:
All engineering and production devices.
Following an error on the bus, the ECAN module is
unable to switch from Listen Only mode directly to
Configuration mode.
Work around
Use the REQOP (CANCON<7:5>) bits to select
Normal mode as an intermediate step when
switching from Listen Only mode to Configuration
mode.
Date Codes that pertain to this issue:
All engineering and production devices.
Frame (SOF) in the third bit of interframe
space.
DS80202G-page 9

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