PIC18LF2580-I/ML Microchip Technology, PIC18LF2580-I/ML Datasheet - Page 5

• Manufacturer Part Number: PIC18LF2580-I/ML
• Description: IC PIC MCU FLASH 16KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2580-I/ML

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1536Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

6. Module: Interrupts
EXAMPLE 1:
 2010 Microchip Technology Inc.
MOVFF
MOVSF
MOVSS
ISR @ 0x0008
Foo:
If an interrupt occurs during a two-cycle instruc-
tion that modifies the STATUS, BSR or WREG
register, the unmodified value of the register will
be saved to the corresponding Fast Return
(Shadow) register. Upon a fast return from the
interrupt, the unmodified value will be restored
to the STATUS, BSR or WREG register.
For example, if a high-priority interrupt occurs
during the instruction, MOVFF TEMP, WREG, the
MOVFF instruction will be completed and WREG
will be loaded with the value of TEMP before
branching to the ISR. However, the previous
value of WREG will be saved to the Fast Return
register during ISR branching. Upon return from
the interrupt with a fast return, the previous
value of WREG in the Fast Return register will
be written to WREG.
This results in WREG containing the value it had
before execution of MOVFF TEMP, WREG.
Affected instructions are:
Where
Where
Where the destination is WREG, BSR or STATUS
CALL
POP
:
:
RETFIE
Fs, Fd
Zs, Fd
[Zs], [Zd]
Fd
Fd
is WREG, BSR or STATUS
is WREG, BSR or STATUS
Foo, FAST
FAST
ASSEMBLY LANGUAGE INTERRUPT SERVICE
; store current value of WREG, BSR, STATUS for a second time
; clears return address of Foo call
; insert high priority ISR code here
PIC18F2480/2580/4480/4580
Work around
1. Assembly Language Programming:
If any two-cycle instruction is used to modify
the WREG, BSR or STATUS register, do not
use the RETFIE FAST instruction to return
from the interrupt. Instead, save and then
restore WREG, BSR and STATUS via soft-
ware, as shown in Example 8-1 in the Device
Data Sheet.
Alternatively, in the case of MOVFF, use the
MOVF instruction to write to WREG instead. For
example:
As another alternative, the work around in
Example 1 can be used. This example over-
writes the Fast Return register by making a
dummy call to Foo with the fast option in the
high-priority service routine.
Use
MOVF
MOVWF
Instead of
MOVFF TEMP, BSR
TEMP, W
BSR
DS80496C-page 5