AT32UC3A3128-ALUT Atmel, AT32UC3A3128-ALUT Datasheet - Page 172
AT32UC3A3128-ALUT
Manufacturer Part Number
AT32UC3A3128-ALUT
Description
IC MCU 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A3128-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
110
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
IrDA/SCI/SCIF/UDI
Maximum Clock Frequency
66 MHz
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Controller Family/series
AT32UC3A
No. Of I/o's
109
Ram Memory Size
32KB
Cpu Speed
66MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A3128-ALUT
Manufacturer:
Atmel
Quantity:
135
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14.6.6.1
32072C–AVR32–2010/03
NAND Flash signals
Figure 14-5. NAND Flash Signal Multiplexing on EBI Pins
The address latch enable and command latch enable signals on the NAND Flash device are
driven by address bits ADDR[22] and ADDR[21] of the EBI address bus. The user should note
that any bit on the EBI address bus can also be used for this purpose. The command, address or
data words on the data bus of the NAND Flash device are distinguished by using their address
within the NCSx address space. The chip enable (CE) signal of the device and the ready/busy
(R/B) signals are connected to I/O Controller lines. The CE signal then remains asserted even
when NCSx is not selected, preventing the device from returning to standby mode.
Figure 14-6. NAND Flash Application Example
Note:
The External Bus Interfaces is also able to support 16-bits devices.
SMC
NWR0_NWE
NCS[2]/[3]
Or I/O line
DATA[7:0]
ADDR[22]
ADDR[21]
NANDWE
EBI
NCS[2/3]
NANDOE
NRD
I/O line
EBI
NandFlash
Logic
NANDWE
NANDOE
AD[7:0]
NandFlash
NWE
NOE
ALE
CLE
R/B
CE
AT32UC3A3/A4
172
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