PIC16F877-04/L Microchip Technology, PIC16F877-04/L Datasheet - Page 69
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PIC16F877-04/L
Manufacturer Part Number
PIC16F877-04/L
Description
IC MCU FLASH 8KX14 EE 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873-04SO.pdf
(218 pages)
5.PIC16F873-04SO.pdf
(5 pages)
6.PIC16F873-04SO.pdf
(5 pages)
Specifications of PIC16F877-04/L
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Controller Family/series
PIC16F
No. Of I/o's
33
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
4MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP, PSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164309 - MODULE SKT FOR PM3 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCC309-1040 - ADAPTER 44-PLCC ZIF TO 40-DIP309-1039 - ADAPTER 44-PLCC TO 40-DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F877-04/L
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16F877-04/L
Manufacturer:
MIC
Quantity:
20 000
REGISTER 9-2:
2001 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3-0
SSPCON: SYNC SERIAL PORT CONTROL REGISTER (ADDRESS 14h)
bit 7
WCOL: Write Collision Detect bit
Master mode:
1 = A write to SSPBUF was attempted while the I2C conditions were not valid
0 = No collision
Slave mode:
1 = SSPBUF register is written while still transmitting the previous word (must be cleared in
0 = No collision
In SPI mode:
1 = A new byte is received while SSPBUF holds previous data. Data in SSPSR is lost on overflow. In Slave
0 = No overflow
In I
1 = A byte is received while the SSPBUF is holding the previous byte. SSPOV is a "don’t care" in Transmit
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
In SPI mode,
When enabled, these pins must be properly configured as input or output
1 = Enables serial port and configures SCK, SDO, SDI, and SS as the source of the serial port pins
0 = Disables serial port and configures these pins as I/O port pins
In I
When enabled, these pins must be properly configured as input or output
1 = Enables the serial port and configures the SDA and SCL pins as the source of the serial port pins
0 = Disables serial port and configures these pins as I/O port pins
CKP: Clock Polarity Select bit
In SPI mode:
1 = Idle state for clock is a high level
0 = Idle state for clock is a low level
In I
SCK release control
1 = Enable clock
0 = Holds clock low (clock stretch). (Used to ensure data setup time.)
In I
Unused in this mode
SSPM3:SSPM0: Synchronous Serial Port Mode Select bits
0000 = SPI Master mode, clock = F
0001 = SPI Master mode, clock = F
0010 = SPI Master mode, clock = F
0011 = SPI Master mode, clock = TMR2 output/2
0100 = SPI Slave mode, clock = SCK pin. SS pin control enabled.
0101 = SPI Slave mode, clock = SCK pin. SS pin control disabled. SS can be used as I/O pin.
0110 = I
0111 = I
1000 = I
1011 = I
1110 = I
1111 = I
1001, 1010, 1100, 1101 = Reserved
Legend:
R = Readable bit
- n = Value at POR
SSPOV: Receive Overflow Indicator bit
WCOL
R/W-0
2
2
2
2
software)
mode, the user must read the SSPBUF, even if only transmitting data, to avoid overflows. In Master
mode, the overflow bit is not set, since each operation is initiated by writing to the SSPBUF register.
(Must be cleared in software.)
C mode:
mode. (Must be cleared in software.)
C mode,
C Slave mode:
C Master mode:
2
2
2
2
2
2
C Firmware Controlled Master mode, 7-bit address with START and STOP bit interrupts enabled
C Slave mode, 7-bit address
C Slave mode, 10-bit address
C Master mode, clock = F
C Firmware Controlled Master mode (slave idle)
C Firmware Controlled Master mode, 10-bit address with START and STOP bit interrupts enabled
SSPOV
R/W-0
W = Writable bit
’1’ = Bit is set
SSPEN
R/W-0
OSC
OSC
OSC
OSC
/4
/16
/64
/ (4 * (SSPADD+1))
R/W-0
CKP
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
SSPM3
R/W-0
SSPM2
R/W-0
PIC16F87X
x = Bit is unknown
SSPM1
R/W-0
DS30292C-page 67
SSPM0
R/W-0
bit 0